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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8c6bb62f6b
In K3 architecture the DMA operates within threads. One end of the thread is UDMAP, the other is on the peripheral side. The UDMAP channel configuration depends on the needs of the remote endpoint and it can be differ from peripheral to peripheral. This patch adds database for am654 and j721e and small API to fetch the PSI-L endpoint configuration from the database which should only used by the DMA driver(s). Another API is added for native peripherals to give possibility to pass new configuration for the threads they are using, which is needed to be able to handle changes caused by different firmware loaded for the peripheral for example. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20191223110458.30766-9-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
94 lines
2.3 KiB
C
94 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
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* Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include "k3-psil-priv.h"
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extern struct psil_ep_map am654_ep_map;
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extern struct psil_ep_map j721e_ep_map;
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static DEFINE_MUTEX(ep_map_mutex);
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static struct psil_ep_map *soc_ep_map;
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struct psil_endpoint_config *psil_get_ep_config(u32 thread_id)
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{
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int i;
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mutex_lock(&ep_map_mutex);
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if (!soc_ep_map) {
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if (of_machine_is_compatible("ti,am654")) {
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soc_ep_map = &am654_ep_map;
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} else if (of_machine_is_compatible("ti,j721e")) {
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soc_ep_map = &j721e_ep_map;
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} else {
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pr_err("PSIL: No compatible machine found for map\n");
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return ERR_PTR(-ENOTSUPP);
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}
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pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name);
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}
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mutex_unlock(&ep_map_mutex);
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if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) {
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/* check in destination thread map */
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for (i = 0; i < soc_ep_map->dst_count; i++) {
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if (soc_ep_map->dst[i].thread_id == thread_id)
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return &soc_ep_map->dst[i].ep_config;
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}
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}
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thread_id &= ~K3_PSIL_DST_THREAD_ID_OFFSET;
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if (soc_ep_map->src) {
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for (i = 0; i < soc_ep_map->src_count; i++) {
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if (soc_ep_map->src[i].thread_id == thread_id)
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return &soc_ep_map->src[i].ep_config;
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}
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}
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL_GPL(psil_get_ep_config);
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int psil_set_new_ep_config(struct device *dev, const char *name,
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struct psil_endpoint_config *ep_config)
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{
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struct psil_endpoint_config *dst_ep_config;
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struct of_phandle_args dma_spec;
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u32 thread_id;
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int index;
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if (!dev || !dev->of_node)
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return -EINVAL;
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index = of_property_match_string(dev->of_node, "dma-names", name);
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if (index < 0)
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return index;
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if (of_parse_phandle_with_args(dev->of_node, "dmas", "#dma-cells",
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index, &dma_spec))
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return -ENOENT;
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thread_id = dma_spec.args[0];
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dst_ep_config = psil_get_ep_config(thread_id);
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if (IS_ERR(dst_ep_config)) {
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pr_err("PSIL: thread ID 0x%04x not defined in map\n",
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thread_id);
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of_node_put(dma_spec.np);
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return PTR_ERR(dst_ep_config);
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}
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memcpy(dst_ep_config, ep_config, sizeof(*dst_ep_config));
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of_node_put(dma_spec.np);
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return 0;
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}
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EXPORT_SYMBOL_GPL(psil_set_new_ep_config);
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