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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d38dcad4e7
Devices might save and restore tuning values so that re-tuning might not be needed after a pm transition. Let drivers decide by pushing the mmc_retune_needed() logic down to them. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
149 lines
3.7 KiB
C
149 lines
3.7 KiB
C
/*
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* sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
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*
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* Copyright (C) 2015 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/io.h>
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#include <linux/mmc/host.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include "sdhci-pltfm.h"
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#ifdef CONFIG_PM_SLEEP
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static int sdhci_brcmstb_suspend(struct device *dev)
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{
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struct sdhci_host *host = dev_get_drvdata(dev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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int res;
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if (host->tuning_mode != SDHCI_TUNING_MODE_3)
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mmc_retune_needed(host->mmc);
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res = sdhci_suspend_host(host);
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if (res)
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return res;
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clk_disable_unprepare(pltfm_host->clk);
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return res;
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}
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static int sdhci_brcmstb_resume(struct device *dev)
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{
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struct sdhci_host *host = dev_get_drvdata(dev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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int err;
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err = clk_prepare_enable(pltfm_host->clk);
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if (err)
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return err;
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return sdhci_resume_host(host);
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}
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#endif /* CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(sdhci_brcmstb_pmops, sdhci_brcmstb_suspend,
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sdhci_brcmstb_resume);
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static const struct sdhci_ops sdhci_brcmstb_ops = {
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.set_clock = sdhci_set_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static struct sdhci_pltfm_data sdhci_brcmstb_pdata = {
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.ops = &sdhci_brcmstb_ops,
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};
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static int sdhci_brcmstb_probe(struct platform_device *pdev)
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{
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struct sdhci_host *host;
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struct sdhci_pltfm_host *pltfm_host;
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struct clk *clk;
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int res;
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "Clock not found in Device Tree\n");
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clk = NULL;
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}
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res = clk_prepare_enable(clk);
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if (res)
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return res;
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host = sdhci_pltfm_init(pdev, &sdhci_brcmstb_pdata, 0);
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if (IS_ERR(host)) {
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res = PTR_ERR(host);
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goto err_clk;
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}
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/* Enable MMC_CAP2_HC_ERASE_SZ for better max discard calculations */
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host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
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sdhci_get_of_property(pdev);
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mmc_of_parse(host->mmc);
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/*
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* Supply the existing CAPS, but clear the UHS modes. This
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* will allow these modes to be specified by device tree
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* properties through mmc_of_parse().
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*/
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host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
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if (of_device_is_compatible(pdev->dev.of_node, "brcm,bcm7425-sdhci"))
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host->caps &= ~SDHCI_CAN_64BIT;
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host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
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host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
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SDHCI_SUPPORT_DDR50);
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host->quirks |= SDHCI_QUIRK_MISSING_CAPS |
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SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
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res = sdhci_add_host(host);
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if (res)
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goto err;
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pltfm_host = sdhci_priv(host);
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pltfm_host->clk = clk;
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return res;
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err:
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sdhci_pltfm_free(pdev);
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err_clk:
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clk_disable_unprepare(clk);
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return res;
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}
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static const struct of_device_id sdhci_brcm_of_match[] = {
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{ .compatible = "brcm,bcm7425-sdhci" },
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{ .compatible = "brcm,bcm7445-sdhci" },
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{},
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};
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MODULE_DEVICE_TABLE(of, sdhci_brcm_of_match);
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static struct platform_driver sdhci_brcmstb_driver = {
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.driver = {
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.name = "sdhci-brcmstb",
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.pm = &sdhci_brcmstb_pmops,
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.of_match_table = of_match_ptr(sdhci_brcm_of_match),
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},
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.probe = sdhci_brcmstb_probe,
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.remove = sdhci_pltfm_unregister,
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};
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module_platform_driver(sdhci_brcmstb_driver);
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MODULE_DESCRIPTION("SDHCI driver for Broadcom BRCMSTB SoCs");
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MODULE_AUTHOR("Broadcom");
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MODULE_LICENSE("GPL v2");
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