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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c5aa59e88f
Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX. Add little-endian register layouts. Patch cvmx-interrupt-rsl.c for changed definition. Signed-off-by: David Daney <david.daney@cavium.com>
293 lines
7.7 KiB
C
293 lines
7.7 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2012 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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#ifndef __CVMX_LED_DEFS_H__
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#define __CVMX_LED_DEFS_H__
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#define CVMX_LED_BLINK (CVMX_ADD_IO_SEG(0x0001180000001A48ull))
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#define CVMX_LED_CLK_PHASE (CVMX_ADD_IO_SEG(0x0001180000001A08ull))
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#define CVMX_LED_CYLON (CVMX_ADD_IO_SEG(0x0001180000001AF8ull))
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#define CVMX_LED_DBG (CVMX_ADD_IO_SEG(0x0001180000001A18ull))
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#define CVMX_LED_EN (CVMX_ADD_IO_SEG(0x0001180000001A00ull))
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#define CVMX_LED_POLARITY (CVMX_ADD_IO_SEG(0x0001180000001A50ull))
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#define CVMX_LED_PRT (CVMX_ADD_IO_SEG(0x0001180000001A10ull))
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#define CVMX_LED_PRT_FMT (CVMX_ADD_IO_SEG(0x0001180000001A30ull))
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#define CVMX_LED_PRT_STATUSX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A80ull) + ((offset) & 7) * 8)
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#define CVMX_LED_UDD_CNTX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A20ull) + ((offset) & 1) * 8)
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#define CVMX_LED_UDD_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A38ull) + ((offset) & 1) * 8)
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#define CVMX_LED_UDD_DAT_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC8ull) + ((offset) & 1) * 16)
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#define CVMX_LED_UDD_DAT_SETX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC0ull) + ((offset) & 1) * 16)
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union cvmx_led_blink {
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uint64_t u64;
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struct cvmx_led_blink_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_8_63:56;
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uint64_t rate:8;
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#else
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uint64_t rate:8;
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uint64_t reserved_8_63:56;
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#endif
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} s;
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struct cvmx_led_blink_s cn38xx;
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struct cvmx_led_blink_s cn38xxp2;
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struct cvmx_led_blink_s cn56xx;
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struct cvmx_led_blink_s cn56xxp1;
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struct cvmx_led_blink_s cn58xx;
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struct cvmx_led_blink_s cn58xxp1;
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};
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union cvmx_led_clk_phase {
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uint64_t u64;
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struct cvmx_led_clk_phase_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_7_63:57;
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uint64_t phase:7;
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#else
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uint64_t phase:7;
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uint64_t reserved_7_63:57;
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#endif
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} s;
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struct cvmx_led_clk_phase_s cn38xx;
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struct cvmx_led_clk_phase_s cn38xxp2;
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struct cvmx_led_clk_phase_s cn56xx;
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struct cvmx_led_clk_phase_s cn56xxp1;
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struct cvmx_led_clk_phase_s cn58xx;
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struct cvmx_led_clk_phase_s cn58xxp1;
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};
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union cvmx_led_cylon {
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uint64_t u64;
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struct cvmx_led_cylon_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_16_63:48;
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uint64_t rate:16;
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#else
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uint64_t rate:16;
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uint64_t reserved_16_63:48;
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#endif
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} s;
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struct cvmx_led_cylon_s cn38xx;
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struct cvmx_led_cylon_s cn38xxp2;
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struct cvmx_led_cylon_s cn56xx;
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struct cvmx_led_cylon_s cn56xxp1;
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struct cvmx_led_cylon_s cn58xx;
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struct cvmx_led_cylon_s cn58xxp1;
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};
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union cvmx_led_dbg {
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uint64_t u64;
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struct cvmx_led_dbg_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_1_63:63;
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uint64_t dbg_en:1;
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#else
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uint64_t dbg_en:1;
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uint64_t reserved_1_63:63;
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#endif
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} s;
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struct cvmx_led_dbg_s cn38xx;
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struct cvmx_led_dbg_s cn38xxp2;
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struct cvmx_led_dbg_s cn56xx;
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struct cvmx_led_dbg_s cn56xxp1;
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struct cvmx_led_dbg_s cn58xx;
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struct cvmx_led_dbg_s cn58xxp1;
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};
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union cvmx_led_en {
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uint64_t u64;
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struct cvmx_led_en_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_1_63:63;
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uint64_t en:1;
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#else
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uint64_t en:1;
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uint64_t reserved_1_63:63;
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#endif
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} s;
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struct cvmx_led_en_s cn38xx;
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struct cvmx_led_en_s cn38xxp2;
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struct cvmx_led_en_s cn56xx;
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struct cvmx_led_en_s cn56xxp1;
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struct cvmx_led_en_s cn58xx;
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struct cvmx_led_en_s cn58xxp1;
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};
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union cvmx_led_polarity {
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uint64_t u64;
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struct cvmx_led_polarity_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_1_63:63;
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uint64_t polarity:1;
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#else
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uint64_t polarity:1;
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uint64_t reserved_1_63:63;
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#endif
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} s;
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struct cvmx_led_polarity_s cn38xx;
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struct cvmx_led_polarity_s cn38xxp2;
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struct cvmx_led_polarity_s cn56xx;
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struct cvmx_led_polarity_s cn56xxp1;
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struct cvmx_led_polarity_s cn58xx;
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struct cvmx_led_polarity_s cn58xxp1;
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};
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union cvmx_led_prt {
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uint64_t u64;
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struct cvmx_led_prt_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_8_63:56;
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uint64_t prt_en:8;
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#else
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uint64_t prt_en:8;
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uint64_t reserved_8_63:56;
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#endif
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} s;
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struct cvmx_led_prt_s cn38xx;
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struct cvmx_led_prt_s cn38xxp2;
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struct cvmx_led_prt_s cn56xx;
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struct cvmx_led_prt_s cn56xxp1;
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struct cvmx_led_prt_s cn58xx;
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struct cvmx_led_prt_s cn58xxp1;
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};
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union cvmx_led_prt_fmt {
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uint64_t u64;
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struct cvmx_led_prt_fmt_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_4_63:60;
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uint64_t format:4;
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#else
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uint64_t format:4;
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uint64_t reserved_4_63:60;
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#endif
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} s;
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struct cvmx_led_prt_fmt_s cn38xx;
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struct cvmx_led_prt_fmt_s cn38xxp2;
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struct cvmx_led_prt_fmt_s cn56xx;
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struct cvmx_led_prt_fmt_s cn56xxp1;
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struct cvmx_led_prt_fmt_s cn58xx;
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struct cvmx_led_prt_fmt_s cn58xxp1;
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};
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union cvmx_led_prt_statusx {
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uint64_t u64;
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struct cvmx_led_prt_statusx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_6_63:58;
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uint64_t status:6;
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#else
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uint64_t status:6;
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uint64_t reserved_6_63:58;
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#endif
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} s;
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struct cvmx_led_prt_statusx_s cn38xx;
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struct cvmx_led_prt_statusx_s cn38xxp2;
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struct cvmx_led_prt_statusx_s cn56xx;
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struct cvmx_led_prt_statusx_s cn56xxp1;
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struct cvmx_led_prt_statusx_s cn58xx;
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struct cvmx_led_prt_statusx_s cn58xxp1;
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};
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union cvmx_led_udd_cntx {
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uint64_t u64;
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struct cvmx_led_udd_cntx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_6_63:58;
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uint64_t cnt:6;
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#else
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uint64_t cnt:6;
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uint64_t reserved_6_63:58;
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#endif
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} s;
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struct cvmx_led_udd_cntx_s cn38xx;
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struct cvmx_led_udd_cntx_s cn38xxp2;
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struct cvmx_led_udd_cntx_s cn56xx;
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struct cvmx_led_udd_cntx_s cn56xxp1;
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struct cvmx_led_udd_cntx_s cn58xx;
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struct cvmx_led_udd_cntx_s cn58xxp1;
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};
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union cvmx_led_udd_datx {
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uint64_t u64;
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struct cvmx_led_udd_datx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_32_63:32;
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uint64_t dat:32;
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#else
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uint64_t dat:32;
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uint64_t reserved_32_63:32;
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#endif
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} s;
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struct cvmx_led_udd_datx_s cn38xx;
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struct cvmx_led_udd_datx_s cn38xxp2;
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struct cvmx_led_udd_datx_s cn56xx;
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struct cvmx_led_udd_datx_s cn56xxp1;
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struct cvmx_led_udd_datx_s cn58xx;
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struct cvmx_led_udd_datx_s cn58xxp1;
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};
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union cvmx_led_udd_dat_clrx {
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uint64_t u64;
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struct cvmx_led_udd_dat_clrx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_32_63:32;
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uint64_t clr:32;
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#else
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uint64_t clr:32;
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uint64_t reserved_32_63:32;
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#endif
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} s;
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struct cvmx_led_udd_dat_clrx_s cn38xx;
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struct cvmx_led_udd_dat_clrx_s cn38xxp2;
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struct cvmx_led_udd_dat_clrx_s cn56xx;
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struct cvmx_led_udd_dat_clrx_s cn56xxp1;
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struct cvmx_led_udd_dat_clrx_s cn58xx;
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struct cvmx_led_udd_dat_clrx_s cn58xxp1;
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};
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union cvmx_led_udd_dat_setx {
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uint64_t u64;
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struct cvmx_led_udd_dat_setx_s {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved_32_63:32;
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uint64_t set:32;
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#else
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uint64_t set:32;
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uint64_t reserved_32_63:32;
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#endif
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} s;
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struct cvmx_led_udd_dat_setx_s cn38xx;
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struct cvmx_led_udd_dat_setx_s cn38xxp2;
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struct cvmx_led_udd_dat_setx_s cn56xx;
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struct cvmx_led_udd_dat_setx_s cn56xxp1;
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struct cvmx_led_udd_dat_setx_s cn58xx;
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struct cvmx_led_udd_dat_setx_s cn58xxp1;
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};
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#endif
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