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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
144 lines
3.1 KiB
C
144 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
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*/
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#ifndef __MT7601U_EEPROM_H
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#define __MT7601U_EEPROM_H
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struct mt7601u_dev;
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#define MT7601U_EE_MAX_VER 0x0d
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#define MT7601U_EEPROM_SIZE 256
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#define MT7601U_DEFAULT_TX_POWER 6
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enum mt76_eeprom_field {
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MT_EE_CHIP_ID = 0x00,
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MT_EE_VERSION_FAE = 0x02,
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MT_EE_VERSION_EE = 0x03,
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MT_EE_MAC_ADDR = 0x04,
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MT_EE_NIC_CONF_0 = 0x34,
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MT_EE_NIC_CONF_1 = 0x36,
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MT_EE_COUNTRY_REGION = 0x39,
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MT_EE_FREQ_OFFSET = 0x3a,
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MT_EE_NIC_CONF_2 = 0x42,
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MT_EE_LNA_GAIN = 0x44,
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MT_EE_RSSI_OFFSET = 0x46,
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MT_EE_TX_POWER_DELTA_BW40 = 0x50,
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MT_EE_TX_POWER_OFFSET = 0x52,
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MT_EE_TX_TSSI_SLOPE = 0x6e,
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MT_EE_TX_TSSI_OFFSET_GROUP = 0x6f,
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MT_EE_TX_TSSI_OFFSET = 0x76,
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MT_EE_TX_TSSI_TARGET_POWER = 0xd0,
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MT_EE_REF_TEMP = 0xd1,
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MT_EE_FREQ_OFFSET_COMPENSATION = 0xdb,
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MT_EE_TX_POWER_BYRATE_BASE = 0xde,
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MT_EE_USAGE_MAP_START = 0x1e0,
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MT_EE_USAGE_MAP_END = 0x1fc,
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};
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#define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)
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#define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4)
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#define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
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#define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
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#define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
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#define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
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#define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
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#define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
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#define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0)
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#define MT_EE_NIC_CONF_2_TX_STREAM GENMASK(7, 4)
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#define MT_EE_NIC_CONF_2_HW_ANTDIV BIT(8)
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#define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
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#define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)
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#define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)
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#define MT_EE_TX_POWER_BYRATE(i) (MT_EE_TX_POWER_BYRATE_BASE + \
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(i) * 4)
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#define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \
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MT_EE_USAGE_MAP_START + 1)
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enum mt7601u_eeprom_access_modes {
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MT_EE_READ = 0,
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MT_EE_PHYSICAL_READ = 1,
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};
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struct power_per_rate {
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u8 raw; /* validated s6 value */
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s8 bw20; /* sign-extended int */
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s8 bw40; /* sign-extended int */
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};
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/* Power per rate - one value per two rates */
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struct mt7601u_rate_power {
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struct power_per_rate cck[2];
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struct power_per_rate ofdm[4];
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struct power_per_rate ht[4];
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};
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struct reg_channel_bounds {
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u8 start;
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u8 num;
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};
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struct mt7601u_eeprom_params {
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bool tssi_enabled;
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u8 rf_freq_off;
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s8 rssi_offset[2];
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s8 ref_temp;
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s8 lna_gain;
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u8 chan_pwr[14];
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struct mt7601u_rate_power power_rate_table;
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s8 real_cck_bw20[2];
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/* TSSI stuff - only with internal TX ALC */
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struct tssi_data {
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int tx0_delta_offset;
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u8 slope;
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u8 offset[3];
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} tssi_data;
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struct reg_channel_bounds reg;
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};
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int mt7601u_eeprom_init(struct mt7601u_dev *dev);
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static inline u32 s6_validate(u32 reg)
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{
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WARN_ON(reg & ~GENMASK(5, 0));
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return reg & GENMASK(5, 0);
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}
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static inline int s6_to_int(u32 reg)
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{
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int s6;
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s6 = s6_validate(reg);
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if (s6 & BIT(5))
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s6 -= BIT(6);
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return s6;
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}
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static inline u32 int_to_s6(int val)
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{
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if (val < -0x20)
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return 0x20;
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if (val > 0x1f)
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return 0x1f;
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return val & 0x3f;
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}
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#endif
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