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bc66392d82
Add initial version of device tree for S32V234-EVB, including nodes for the 4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and Generic Interrupt Controller (GIC). Keep SoC level separate from board level to let future boards with this SoC share common properties, while the dts files will keep board-dependent properties. Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com> Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com> Signed-off-by: Phu Luu An <phu.luuan@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
26 lines
371 B
Plaintext
26 lines
371 B
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*/
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/dts-v1/;
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#include "s32v234.dtsi"
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/ {
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model = "NXP S32V234-EVB2 Board";
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compatible = "fsl,s32v234-evb", "fsl,s32v234";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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