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d2eced9456
The OTG capable USB2 PHY has a reset line (which is shared with other components, such as the USB3 PHY for example) and a clock (which are both part of different registers). Add the properties for the reset line and clocks as optional ones since not all PHYs have them (currently only the OTG capable PHY is known to use these). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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.. | ||
bindings | ||
00-INDEX | ||
booting-without-of.txt | ||
changesets.txt | ||
dynamic-resolution-notes.txt | ||
of_unittest.txt | ||
overlay-notes.txt | ||
todo.txt | ||
usage-model.txt |