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e6e5dd3566
Add initial support to the Broadcom iProc I2C controller found in the iProc family of SoCs. The iProc I2C controller has separate internal TX and RX FIFOs, each has a size of 64 bytes. The iProc I2C controller supports two bus speeds including standard mode (100kHz) and fast mode (400kHz) Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Reviewed-by: Kevin Cernekee <cernekee@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
38 lines
719 B
Plaintext
38 lines
719 B
Plaintext
Broadcom iProc I2C controller
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Required properties:
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- compatible:
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Must be "brcm,iproc-i2c"
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- reg:
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Define the base and range of the I/O address space that contain the iProc
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I2C controller registers
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- interrupts:
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Should contain the I2C interrupt
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- clock-frequency:
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This is the I2C bus clock. Need to be either 100000 or 400000
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- #address-cells:
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Always 1 (for I2C addresses)
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- #size-cells:
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Always 0
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Example:
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i2c0: i2c@18008000 {
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compatible = "brcm,iproc-i2c";
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reg = <0x18008000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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codec: wm8750@1a {
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compatible = "wlf,wm8750";
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reg = <0x1a>;
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};
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};
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