mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 20:16:05 +07:00
321 lines
7.8 KiB
C
321 lines
7.8 KiB
C
#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/types.h>
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#include <asm/pgtable.h>
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#define virt_to_phys(a) ((unsigned long)__pa(a))
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#define phys_to_virt(a) __va(a)
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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static inline unsigned long isa_bus_to_virt(unsigned long addr) {
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BUG();
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return 0;
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}
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static inline unsigned long isa_virt_to_bus(void *addr) {
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BUG();
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return 0;
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}
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/*
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* Memory mapped I/O
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*
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* readX()/writeX() do byteswapping and take an ioremapped address
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* __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
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* gsc_*() don't byteswap and operate on physical addresses;
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* eg dev->hpa or 0xfee00000.
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*/
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static inline unsigned char gsc_readb(unsigned long addr)
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{
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long flags;
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unsigned char ret;
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__asm__ __volatile__(
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" rsm 2,%0\n"
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" ldbx 0(%2),%1\n"
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" mtsm %0\n"
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: "=&r" (flags), "=r" (ret) : "r" (addr) );
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return ret;
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}
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static inline unsigned short gsc_readw(unsigned long addr)
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{
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long flags;
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unsigned short ret;
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__asm__ __volatile__(
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" rsm 2,%0\n"
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" ldhx 0(%2),%1\n"
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" mtsm %0\n"
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: "=&r" (flags), "=r" (ret) : "r" (addr) );
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return ret;
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}
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static inline unsigned int gsc_readl(unsigned long addr)
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{
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u32 ret;
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__asm__ __volatile__(
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" ldwax 0(%1),%0\n"
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: "=r" (ret) : "r" (addr) );
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return ret;
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}
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static inline unsigned long long gsc_readq(unsigned long addr)
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{
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unsigned long long ret;
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#ifdef CONFIG_64BIT
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__asm__ __volatile__(
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" ldda 0(%1),%0\n"
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: "=r" (ret) : "r" (addr) );
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#else
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/* two reads may have side effects.. */
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ret = ((u64) gsc_readl(addr)) << 32;
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ret |= gsc_readl(addr+4);
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#endif
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return ret;
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}
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static inline void gsc_writeb(unsigned char val, unsigned long addr)
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{
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long flags;
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__asm__ __volatile__(
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" rsm 2,%0\n"
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" stbs %1,0(%2)\n"
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" mtsm %0\n"
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: "=&r" (flags) : "r" (val), "r" (addr) );
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}
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static inline void gsc_writew(unsigned short val, unsigned long addr)
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{
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long flags;
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__asm__ __volatile__(
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" rsm 2,%0\n"
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" sths %1,0(%2)\n"
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" mtsm %0\n"
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: "=&r" (flags) : "r" (val), "r" (addr) );
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}
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static inline void gsc_writel(unsigned int val, unsigned long addr)
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{
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__asm__ __volatile__(
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" stwas %0,0(%1)\n"
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: : "r" (val), "r" (addr) );
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}
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static inline void gsc_writeq(unsigned long long val, unsigned long addr)
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{
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#ifdef CONFIG_64BIT
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__asm__ __volatile__(
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" stda %0,0(%1)\n"
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: : "r" (val), "r" (addr) );
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#else
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/* two writes may have side effects.. */
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gsc_writel(val >> 32, addr);
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gsc_writel(val, addr+4);
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#endif
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}
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/*
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* The standard PCI ioremap interfaces
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*/
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extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
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/* Most machines react poorly to I/O-space being cacheable... Instead let's
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* define ioremap() in terms of ioremap_nocache().
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*/
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static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
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{
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return __ioremap(offset, size, _PAGE_NO_CACHE);
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}
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#define ioremap_nocache(off, sz) ioremap((off), (sz))
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extern void iounmap(const volatile void __iomem *addr);
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static inline unsigned char __raw_readb(const volatile void __iomem *addr)
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{
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return (*(volatile unsigned char __force *) (addr));
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}
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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{
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return *(volatile unsigned short __force *) addr;
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}
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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{
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return *(volatile unsigned int __force *) addr;
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}
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static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
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{
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return *(volatile unsigned long long __force *) addr;
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}
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static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *) addr = b;
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}
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static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *) addr = b;
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}
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static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *) addr = b;
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}
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static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
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{
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*(volatile unsigned long long __force *) addr = b;
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}
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static inline unsigned char readb(const volatile void __iomem *addr)
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{
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return __raw_readb(addr);
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}
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static inline unsigned short readw(const volatile void __iomem *addr)
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{
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return le16_to_cpu(__raw_readw(addr));
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}
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static inline unsigned int readl(const volatile void __iomem *addr)
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{
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return le32_to_cpu(__raw_readl(addr));
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}
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static inline unsigned long long readq(const volatile void __iomem *addr)
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{
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return le64_to_cpu(__raw_readq(addr));
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}
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static inline void writeb(unsigned char b, volatile void __iomem *addr)
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{
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__raw_writeb(b, addr);
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}
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static inline void writew(unsigned short w, volatile void __iomem *addr)
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{
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__raw_writew(cpu_to_le16(w), addr);
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}
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static inline void writel(unsigned int l, volatile void __iomem *addr)
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{
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__raw_writel(cpu_to_le32(l), addr);
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}
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static inline void writeq(unsigned long long q, volatile void __iomem *addr)
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{
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__raw_writeq(cpu_to_le64(q), addr);
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}
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#define readb readb
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#define readw readw
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#define readl readl
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#define readq readq
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#define writeb writeb
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#define writew writew
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#define writel writel
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#define writeq writeq
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define readq_relaxed(addr) readq(addr)
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#define mmiowb() do { } while (0)
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void memset_io(volatile void __iomem *addr, unsigned char val, int count);
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void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
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void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
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/* Port-space IO */
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#define inb_p inb
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#define inw_p inw
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#define inl_p inl
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#define outb_p outb
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#define outw_p outw
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#define outl_p outl
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extern unsigned char eisa_in8(unsigned short port);
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extern unsigned short eisa_in16(unsigned short port);
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extern unsigned int eisa_in32(unsigned short port);
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extern void eisa_out8(unsigned char data, unsigned short port);
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extern void eisa_out16(unsigned short data, unsigned short port);
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extern void eisa_out32(unsigned int data, unsigned short port);
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#if defined(CONFIG_PCI)
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extern unsigned char inb(int addr);
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extern unsigned short inw(int addr);
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extern unsigned int inl(int addr);
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extern void outb(unsigned char b, int addr);
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extern void outw(unsigned short b, int addr);
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extern void outl(unsigned int b, int addr);
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#elif defined(CONFIG_EISA)
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#define inb eisa_in8
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#define inw eisa_in16
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#define inl eisa_in32
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#define outb eisa_out8
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#define outw eisa_out16
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#define outl eisa_out32
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#else
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static inline char inb(unsigned long addr)
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{
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BUG();
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return -1;
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}
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static inline short inw(unsigned long addr)
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{
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BUG();
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return -1;
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}
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static inline int inl(unsigned long addr)
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{
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BUG();
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return -1;
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}
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#define outb(x, y) BUG()
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#define outw(x, y) BUG()
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#define outl(x, y) BUG()
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#endif
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/*
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* String versions of in/out ops:
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*/
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extern void insb (unsigned long port, void *dst, unsigned long count);
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extern void insw (unsigned long port, void *dst, unsigned long count);
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extern void insl (unsigned long port, void *dst, unsigned long count);
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extern void outsb (unsigned long port, const void *src, unsigned long count);
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extern void outsw (unsigned long port, const void *src, unsigned long count);
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extern void outsl (unsigned long port, const void *src, unsigned long count);
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/* IO Port space is : BBiiii where BB is HBA number. */
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#define IO_SPACE_LIMIT 0x00ffffff
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/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
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* bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
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* mode (essentially just sign extending. This macro takes in a 32
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* bit I/O address (still with the leading f) and outputs the correct
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* value for either 32 or 64 bit mode */
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#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
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#include <asm-generic/iomap.h>
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#endif
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