mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
d1b5e41e13
This adds the driver for the ARM Framebuffer Compression decoders found in the Amlogic GXM and G12A SoCs. The Amlogic GXM and G12A AFBC decoder are totally different, the GXM only handling only the AFBC v1.0 modes and the G12A decoder handling the AFBC v1.2 modes. The G12A AFBC decoder is an external IP integrated in the video pipeline, and the GXM AFBC decoder seems to the an Amlogic custom decoder more tighly integrated in the video pipeline. The GXM AFBC decoder can handle only one AFBC plane for 2 available OSD planes available in HW, and the G12A AFBC decoder can handle up to 4 AFBC planes for up to 3 OSD planes available in HW. The Amlogic GXM supports 16x16 SPARSE and 16x16 SPLIT AFBC buffers up to 4k. On the other side, for G12A SPLIT is mandatory in 16x16 block mode, but for 4k modes 32x8+SPLIT AFBC buffers is manadatory for performances reasons. The RDMA is used here to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a long period of time, producing display glitches. For this we use the meson_rdma_writel_sync() which adds the register write tuple (VPU register offset and register value) to the RDMA buffer and write the value to the HW. When enabled, the RDMA is enabled to rewrite the same sequence at the next VSYNC event, until a new buffer is committed to the OSD plane. Then the Amlogic G12A is switched to RDMA, the Amlogic GXM Decoder doesn't need a reset/reprogram at each vsync, but needs to keep the vsync interrupt enabled to trigger the RDMA module. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> [narmstrong: fixed typo in commit log] Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-6-narmstrong@baylibre.com
552 lines
13 KiB
C
552 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2014 Endless Mobile
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*
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* Written by:
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* Jasper St. Pierre <jstpierre@mecheye.net>
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*/
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#include <linux/soc/amlogic/meson-canvas.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_irq.h>
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#include <drm/drm_modeset_helper_vtables.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "meson_crtc.h"
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#include "meson_drv.h"
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#include "meson_overlay.h"
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#include "meson_plane.h"
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#include "meson_osd_afbcd.h"
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#include "meson_registers.h"
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#include "meson_venc_cvbs.h"
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#include "meson_viu.h"
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#include "meson_vpp.h"
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#include "meson_rdma.h"
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#define DRIVER_NAME "meson"
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#define DRIVER_DESC "Amlogic Meson DRM driver"
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/**
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* DOC: Video Processing Unit
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*
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* VPU Handles the Global Video Processing, it includes management of the
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* clocks gates, blocks reset lines and power domains.
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*
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* What is missing :
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*
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* - Full reset of entire video processing HW blocks
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* - Scaling and setup of the VPU clock
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* - Bus clock gates
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* - Powering up video processing HW blocks
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* - Powering Up HDMI controller and PHY
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*/
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static const struct drm_mode_config_funcs meson_mode_config_funcs = {
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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.fb_create = drm_gem_fb_create,
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};
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static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
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.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
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};
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static irqreturn_t meson_irq(int irq, void *arg)
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{
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struct drm_device *dev = arg;
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struct meson_drm *priv = dev->dev_private;
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(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
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meson_crtc_irq(priv);
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return IRQ_HANDLED;
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}
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static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
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struct drm_mode_create_dumb *args)
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{
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/*
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* We need 64bytes aligned stride, and PAGE aligned size
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*/
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args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
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args->size = PAGE_ALIGN(args->pitch * args->height);
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return drm_gem_cma_dumb_create_internal(file, dev, args);
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}
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DEFINE_DRM_GEM_CMA_FOPS(fops);
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static struct drm_driver meson_driver = {
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.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
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/* IRQ */
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.irq_handler = meson_irq,
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/* PRIME Ops */
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
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.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
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.gem_prime_vmap = drm_gem_cma_prime_vmap,
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.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
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.gem_prime_mmap = drm_gem_cma_prime_mmap,
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/* GEM Ops */
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.dumb_create = meson_dumb_create,
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.gem_free_object_unlocked = drm_gem_cma_free_object,
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.gem_vm_ops = &drm_gem_cma_vm_ops,
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/* Misc */
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.fops = &fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = "20161109",
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.major = 1,
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.minor = 0,
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};
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static bool meson_vpu_has_available_connectors(struct device *dev)
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{
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struct device_node *ep, *remote;
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/* Parses each endpoint and check if remote exists */
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for_each_endpoint_of_node(dev->of_node, ep) {
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/* If the endpoint node exists, consider it enabled */
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remote = of_graph_get_remote_port(ep);
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if (remote)
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return true;
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}
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return false;
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}
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static struct regmap_config meson_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x1000,
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};
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static void meson_vpu_init(struct meson_drm *priv)
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{
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u32 value;
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/*
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* Slave dc0 and dc5 connected to master port 1.
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* By default other slaves are connected to master port 0.
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*/
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value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
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VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
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writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
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/* Slave dc0 connected to master port 1 */
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value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
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writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
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/* Slave dc4 and dc7 connected to master port 1 */
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value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
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VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
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writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
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/* Slave dc1 connected to master port 1 */
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value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
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writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
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}
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static void meson_remove_framebuffers(void)
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{
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struct apertures_struct *ap;
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ap = alloc_apertures(1);
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if (!ap)
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return;
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/* The framebuffer can be located anywhere in RAM */
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ap->ranges[0].base = 0;
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ap->ranges[0].size = ~0;
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drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
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false);
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kfree(ap);
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}
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static int meson_drv_bind_master(struct device *dev, bool has_components)
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{
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struct platform_device *pdev = to_platform_device(dev);
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const struct meson_drm_match_data *match;
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struct meson_drm *priv;
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struct drm_device *drm;
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struct resource *res;
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void __iomem *regs;
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int ret;
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/* Checks if an output connector is available */
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if (!meson_vpu_has_available_connectors(dev)) {
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dev_err(dev, "No output connector available\n");
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return -ENODEV;
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}
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match = of_device_get_match_data(dev);
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if (!match)
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return -ENODEV;
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drm = drm_dev_alloc(&meson_driver, dev);
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if (IS_ERR(drm))
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return PTR_ERR(drm);
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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goto free_drm;
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}
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drm->dev_private = priv;
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priv->drm = drm;
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priv->dev = dev;
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priv->compat = match->compat;
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priv->afbcd.ops = match->afbcd_ops;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
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regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(regs)) {
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ret = PTR_ERR(regs);
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goto free_drm;
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}
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priv->io_base = regs;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
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if (!res) {
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ret = -EINVAL;
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goto free_drm;
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}
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/* Simply ioremap since it may be a shared register zone */
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regs = devm_ioremap(dev, res->start, resource_size(res));
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if (!regs) {
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ret = -EADDRNOTAVAIL;
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goto free_drm;
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}
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priv->hhi = devm_regmap_init_mmio(dev, regs,
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&meson_regmap_config);
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if (IS_ERR(priv->hhi)) {
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dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
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ret = PTR_ERR(priv->hhi);
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goto free_drm;
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}
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priv->canvas = meson_canvas_get(dev);
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if (IS_ERR(priv->canvas)) {
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ret = PTR_ERR(priv->canvas);
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goto free_drm;
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}
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ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
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if (ret)
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goto free_drm;
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ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
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if (ret) {
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meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
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goto free_drm;
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}
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ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
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if (ret) {
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meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
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goto free_drm;
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}
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ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
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if (ret) {
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meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
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goto free_drm;
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}
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priv->vsync_irq = platform_get_irq(pdev, 0);
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ret = drm_vblank_init(drm, 1);
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if (ret)
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goto free_drm;
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/* Remove early framebuffers (ie. simplefb) */
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meson_remove_framebuffers();
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drm_mode_config_init(drm);
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drm->mode_config.max_width = 3840;
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drm->mode_config.max_height = 2160;
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drm->mode_config.funcs = &meson_mode_config_funcs;
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drm->mode_config.helper_private = &meson_mode_config_helpers;
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/* Hardware Initialization */
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meson_vpu_init(priv);
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meson_venc_init(priv);
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meson_vpp_init(priv);
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meson_viu_init(priv);
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if (priv->afbcd.ops) {
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ret = priv->afbcd.ops->init(priv);
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if (ret)
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return ret;
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}
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/* Encoder Initialization */
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ret = meson_venc_cvbs_create(priv);
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if (ret)
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goto free_drm;
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if (has_components) {
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ret = component_bind_all(drm->dev, drm);
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if (ret) {
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dev_err(drm->dev, "Couldn't bind all components\n");
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goto free_drm;
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}
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}
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ret = meson_plane_create(priv);
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if (ret)
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goto free_drm;
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ret = meson_overlay_create(priv);
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if (ret)
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goto free_drm;
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ret = meson_crtc_create(priv);
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if (ret)
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goto free_drm;
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ret = drm_irq_install(drm, priv->vsync_irq);
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if (ret)
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goto free_drm;
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drm_mode_config_reset(drm);
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drm_kms_helper_poll_init(drm);
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platform_set_drvdata(pdev, priv);
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ret = drm_dev_register(drm, 0);
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if (ret)
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goto uninstall_irq;
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drm_fbdev_generic_setup(drm, 32);
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return 0;
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uninstall_irq:
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drm_irq_uninstall(drm);
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free_drm:
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drm_dev_put(drm);
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return ret;
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}
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static int meson_drv_bind(struct device *dev)
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{
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return meson_drv_bind_master(dev, true);
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}
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static void meson_drv_unbind(struct device *dev)
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{
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struct meson_drm *priv = dev_get_drvdata(dev);
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struct drm_device *drm = priv->drm;
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if (priv->canvas) {
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meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
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meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
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}
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if (priv->afbcd.ops) {
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priv->afbcd.ops->reset(priv);
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meson_rdma_free(priv);
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}
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drm_dev_unregister(drm);
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drm_irq_uninstall(drm);
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drm_kms_helper_poll_fini(drm);
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drm_mode_config_cleanup(drm);
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drm_dev_put(drm);
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}
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static const struct component_master_ops meson_drv_master_ops = {
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.bind = meson_drv_bind,
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.unbind = meson_drv_unbind,
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};
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static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
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{
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struct meson_drm *priv = dev_get_drvdata(dev);
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if (!priv)
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return 0;
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return drm_mode_config_helper_suspend(priv->drm);
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}
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static int __maybe_unused meson_drv_pm_resume(struct device *dev)
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{
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struct meson_drm *priv = dev_get_drvdata(dev);
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if (!priv)
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return 0;
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meson_vpu_init(priv);
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meson_venc_init(priv);
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meson_vpp_init(priv);
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meson_viu_init(priv);
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if (priv->afbcd.ops)
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priv->afbcd.ops->init(priv);
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drm_mode_config_helper_resume(priv->drm);
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return 0;
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}
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static int compare_of(struct device *dev, void *data)
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{
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DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
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dev->of_node, data);
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return dev->of_node == data;
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}
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/* Possible connectors nodes to ignore */
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static const struct of_device_id connectors_match[] = {
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{ .compatible = "composite-video-connector" },
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{ .compatible = "svideo-connector" },
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{ .compatible = "hdmi-connector" },
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{ .compatible = "dvi-connector" },
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{}
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};
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static int meson_probe_remote(struct platform_device *pdev,
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struct component_match **match,
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struct device_node *parent,
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struct device_node *remote)
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{
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struct device_node *ep, *remote_node;
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int count = 1;
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/* If node is a connector, return and do not add to match table */
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if (of_match_node(connectors_match, remote))
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return 1;
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component_match_add(&pdev->dev, match, compare_of, remote);
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for_each_endpoint_of_node(remote, ep) {
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remote_node = of_graph_get_remote_port_parent(ep);
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if (!remote_node ||
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remote_node == parent || /* Ignore parent endpoint */
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!of_device_is_available(remote_node)) {
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of_node_put(remote_node);
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continue;
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}
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count += meson_probe_remote(pdev, match, remote, remote_node);
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of_node_put(remote_node);
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}
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return count;
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}
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static int meson_drv_probe(struct platform_device *pdev)
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{
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struct component_match *match = NULL;
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struct device_node *np = pdev->dev.of_node;
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struct device_node *ep, *remote;
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int count = 0;
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for_each_endpoint_of_node(np, ep) {
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remote = of_graph_get_remote_port_parent(ep);
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if (!remote || !of_device_is_available(remote)) {
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of_node_put(remote);
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continue;
|
|
}
|
|
|
|
count += meson_probe_remote(pdev, &match, np, remote);
|
|
of_node_put(remote);
|
|
}
|
|
|
|
if (count && !match)
|
|
return meson_drv_bind_master(&pdev->dev, false);
|
|
|
|
/* If some endpoints were found, initialize the nodes */
|
|
if (count) {
|
|
dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
|
|
|
|
return component_master_add_with_match(&pdev->dev,
|
|
&meson_drv_master_ops,
|
|
match);
|
|
}
|
|
|
|
/* If no output endpoints were available, simply bail out */
|
|
return 0;
|
|
};
|
|
|
|
static struct meson_drm_match_data meson_drm_gxbb_data = {
|
|
.compat = VPU_COMPATIBLE_GXBB,
|
|
};
|
|
|
|
static struct meson_drm_match_data meson_drm_gxl_data = {
|
|
.compat = VPU_COMPATIBLE_GXL,
|
|
};
|
|
|
|
static struct meson_drm_match_data meson_drm_gxm_data = {
|
|
.compat = VPU_COMPATIBLE_GXM,
|
|
.afbcd_ops = &meson_afbcd_gxm_ops,
|
|
};
|
|
|
|
static struct meson_drm_match_data meson_drm_g12a_data = {
|
|
.compat = VPU_COMPATIBLE_G12A,
|
|
.afbcd_ops = &meson_afbcd_g12a_ops,
|
|
};
|
|
|
|
static const struct of_device_id dt_match[] = {
|
|
{ .compatible = "amlogic,meson-gxbb-vpu",
|
|
.data = (void *)&meson_drm_gxbb_data },
|
|
{ .compatible = "amlogic,meson-gxl-vpu",
|
|
.data = (void *)&meson_drm_gxl_data },
|
|
{ .compatible = "amlogic,meson-gxm-vpu",
|
|
.data = (void *)&meson_drm_gxm_data },
|
|
{ .compatible = "amlogic,meson-g12a-vpu",
|
|
.data = (void *)&meson_drm_g12a_data },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, dt_match);
|
|
|
|
static const struct dev_pm_ops meson_drv_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
|
|
};
|
|
|
|
static struct platform_driver meson_drm_platform_driver = {
|
|
.probe = meson_drv_probe,
|
|
.driver = {
|
|
.name = "meson-drm",
|
|
.of_match_table = dt_match,
|
|
.pm = &meson_drv_pm_ops,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(meson_drm_platform_driver);
|
|
|
|
MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
|
|
MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL");
|