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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8060ef4da9
This patch adds support to configure the AEMIF interface with supplied timing values. Since this capability is useful both from NOR and NAND flashes, it is provided as a new interface and in a file of its own. AEMIF timing configuration is required in cases: 1) Where the AEMIF clock rate can change at runtime (a side affect of cpu frequency change). 2) Where U-Boot does not support NAND/NOR but supports other media like SPI Flash or MMC/SD and thus does not care about setting up the AEMIF timing for kernel to use. 3) Where U-Boot just hasn't configured the timing values and cannot be upgraded because the box is already in the field. Since there is now a header file for AEMIF interface, the common (non-NAND specific) defines for AEMIF registers have been moved from nand.h into the newly created aemif.h Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
134 lines
3.7 KiB
C
134 lines
3.7 KiB
C
/*
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* AEMIF support for DaVinci SoCs
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*
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* Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <mach/aemif.h>
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/* Timing value configuration */
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#define TA(x) ((x) << 2)
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#define RHOLD(x) ((x) << 4)
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#define RSTROBE(x) ((x) << 7)
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#define RSETUP(x) ((x) << 13)
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#define WHOLD(x) ((x) << 17)
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#define WSTROBE(x) ((x) << 20)
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#define WSETUP(x) ((x) << 26)
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#define TA_MAX 0x3
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#define RHOLD_MAX 0x7
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#define RSTROBE_MAX 0x3f
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#define RSETUP_MAX 0xf
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#define WHOLD_MAX 0x7
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#define WSTROBE_MAX 0x3f
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#define WSETUP_MAX 0xf
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#define TIMING_MASK (TA(TA_MAX) | \
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RHOLD(RHOLD_MAX) | \
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RSTROBE(RSTROBE_MAX) | \
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RSETUP(RSETUP_MAX) | \
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WHOLD(WHOLD_MAX) | \
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WSTROBE(WSTROBE_MAX) | \
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WSETUP(WSETUP_MAX))
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/*
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* aemif_calc_rate - calculate timing data.
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* @wanted: The cycle time needed in nanoseconds.
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* @clk: The input clock rate in kHz.
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* @max: The maximum divider value that can be programmed.
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*
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* On success, returns the calculated timing value minus 1 for easy
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* programming into AEMIF timing registers, else negative errno.
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*/
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static int aemif_calc_rate(int wanted, unsigned long clk, int max)
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{
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int result;
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result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
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pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
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/* It is generally OK to have a more relaxed timing than requested... */
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if (result < 0)
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result = 0;
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/* ... But configuring tighter timings is not an option. */
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else if (result > max)
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result = -EINVAL;
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return result;
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}
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/**
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* davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
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* @t: timing values to be progammed
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* @base: The virtual base address of the AEMIF interface
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* @cs: chip-select to program the timing values for
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*
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* This function programs the given timing values (in real clock) into the
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* AEMIF registers taking the AEMIF clock into account.
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*
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* This function does not use any locking while programming the AEMIF
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* because it is expected that there is only one user of a given
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* chip-select.
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*
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* Returns 0 on success, else negative errno.
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*/
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int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
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void __iomem *base, unsigned cs)
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{
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unsigned set, val;
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unsigned ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
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unsigned offset = A1CR_OFFSET + cs * 4;
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struct clk *aemif_clk;
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unsigned long clkrate;
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if (!t)
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return 0; /* Nothing to do */
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aemif_clk = clk_get(NULL, "aemif");
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if (IS_ERR(aemif_clk))
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return PTR_ERR(aemif_clk);
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clkrate = clk_get_rate(aemif_clk);
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clkrate /= 1000; /* turn clock into kHz for ease of use */
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ta = aemif_calc_rate(t->ta, clkrate, TA_MAX);
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rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
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rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
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rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
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whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
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wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
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wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
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if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
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whold < 0 || wstrobe < 0 || wsetup < 0) {
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pr_err("%s: cannot get suitable timings\n", __func__);
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return -EINVAL;
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}
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set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
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WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
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val = __raw_readl(base + offset);
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val &= ~TIMING_MASK;
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val |= set;
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__raw_writel(val, base + offset);
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return 0;
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}
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EXPORT_SYMBOL(davinci_aemif_setup_timing);
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