mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-01 04:46:42 +07:00
cad9bc6904
If an o32 process generates a core dump on a 64 bit kernel, the core file will not be correctly recognized. This is because ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS are not correctly defined for o32 and will use the default register set which would be CONFIG_64BIT in asm/elf.h. So we'll switch to use the right register defines in this situation by checking for WANT_COMPAT_REG_H and use the right defines of ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS. [Ralf: made ELF_CORE_COPY_TASK_REGS() bullet-proof against funny arguments.] Signed-off-by: Yong Zhang <yong.zhang@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
372 lines
11 KiB
C
372 lines
11 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Much of this is taken from binutils and GNU libc ...
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*/
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#ifndef _ASM_ELF_H
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#define _ASM_ELF_H
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/* ELF header e_flags defines. */
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/* MIPS architecture level. */
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#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
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#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
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#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
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#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
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#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
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#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
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#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
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#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
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#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
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/* The ABI of a file. */
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#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
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#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
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#define PT_MIPS_REGINFO 0x70000000
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#define PT_MIPS_RTPROC 0x70000001
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#define PT_MIPS_OPTIONS 0x70000002
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/* Flags in the e_flags field of the header */
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#define EF_MIPS_NOREORDER 0x00000001
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#define EF_MIPS_PIC 0x00000002
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#define EF_MIPS_CPIC 0x00000004
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#define EF_MIPS_ABI2 0x00000020
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#define EF_MIPS_OPTIONS_FIRST 0x00000080
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#define EF_MIPS_32BITMODE 0x00000100
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#define EF_MIPS_ABI 0x0000f000
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#define EF_MIPS_ARCH 0xf0000000
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#define DT_MIPS_RLD_VERSION 0x70000001
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#define DT_MIPS_TIME_STAMP 0x70000002
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#define DT_MIPS_ICHECKSUM 0x70000003
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#define DT_MIPS_IVERSION 0x70000004
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#define DT_MIPS_FLAGS 0x70000005
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#define RHF_NONE 0x00000000
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#define RHF_HARDWAY 0x00000001
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#define RHF_NOTPOT 0x00000002
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#define RHF_SGI_ONLY 0x00000010
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#define DT_MIPS_BASE_ADDRESS 0x70000006
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#define DT_MIPS_CONFLICT 0x70000008
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#define DT_MIPS_LIBLIST 0x70000009
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#define DT_MIPS_LOCAL_GOTNO 0x7000000a
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#define DT_MIPS_CONFLICTNO 0x7000000b
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#define DT_MIPS_LIBLISTNO 0x70000010
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#define DT_MIPS_SYMTABNO 0x70000011
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#define DT_MIPS_UNREFEXTNO 0x70000012
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#define DT_MIPS_GOTSYM 0x70000013
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#define DT_MIPS_HIPAGENO 0x70000014
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#define DT_MIPS_RLD_MAP 0x70000016
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#define R_MIPS_NONE 0
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#define R_MIPS_16 1
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#define R_MIPS_32 2
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#define R_MIPS_REL32 3
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#define R_MIPS_26 4
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#define R_MIPS_HI16 5
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#define R_MIPS_LO16 6
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#define R_MIPS_GPREL16 7
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#define R_MIPS_LITERAL 8
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#define R_MIPS_GOT16 9
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#define R_MIPS_PC16 10
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#define R_MIPS_CALL16 11
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#define R_MIPS_GPREL32 12
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/* The remaining relocs are defined on Irix, although they are not
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in the MIPS ELF ABI. */
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#define R_MIPS_UNUSED1 13
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#define R_MIPS_UNUSED2 14
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#define R_MIPS_UNUSED3 15
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#define R_MIPS_SHIFT5 16
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#define R_MIPS_SHIFT6 17
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#define R_MIPS_64 18
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#define R_MIPS_GOT_DISP 19
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#define R_MIPS_GOT_PAGE 20
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#define R_MIPS_GOT_OFST 21
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/*
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* The following two relocation types are specified in the MIPS ABI
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* conformance guide version 1.2 but not yet in the psABI.
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*/
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#define R_MIPS_GOTHI16 22
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#define R_MIPS_GOTLO16 23
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#define R_MIPS_SUB 24
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#define R_MIPS_INSERT_A 25
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#define R_MIPS_INSERT_B 26
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#define R_MIPS_DELETE 27
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#define R_MIPS_HIGHER 28
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#define R_MIPS_HIGHEST 29
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/*
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* The following two relocation types are specified in the MIPS ABI
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* conformance guide version 1.2 but not yet in the psABI.
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*/
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#define R_MIPS_CALLHI16 30
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#define R_MIPS_CALLLO16 31
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/*
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* This range is reserved for vendor specific relocations.
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*/
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#define R_MIPS_LOVENDOR 100
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#define R_MIPS_HIVENDOR 127
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#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
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#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
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#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
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#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
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#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
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#define SHT_MIPS_LIST 0x70000000
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#define SHT_MIPS_CONFLICT 0x70000002
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#define SHT_MIPS_GPTAB 0x70000003
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#define SHT_MIPS_UCODE 0x70000004
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#define SHT_MIPS_DEBUG 0x70000005
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#define SHT_MIPS_REGINFO 0x70000006
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#define SHT_MIPS_PACKAGE 0x70000007
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#define SHT_MIPS_PACKSYM 0x70000008
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#define SHT_MIPS_RELD 0x70000009
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#define SHT_MIPS_IFACE 0x7000000b
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#define SHT_MIPS_CONTENT 0x7000000c
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#define SHT_MIPS_OPTIONS 0x7000000d
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#define SHT_MIPS_SHDR 0x70000010
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#define SHT_MIPS_FDESC 0x70000011
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#define SHT_MIPS_EXTSYM 0x70000012
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#define SHT_MIPS_DENSE 0x70000013
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#define SHT_MIPS_PDESC 0x70000014
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#define SHT_MIPS_LOCSYM 0x70000015
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#define SHT_MIPS_AUXSYM 0x70000016
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#define SHT_MIPS_OPTSYM 0x70000017
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#define SHT_MIPS_LOCSTR 0x70000018
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#define SHT_MIPS_LINE 0x70000019
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#define SHT_MIPS_RFDESC 0x7000001a
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#define SHT_MIPS_DELTASYM 0x7000001b
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#define SHT_MIPS_DELTAINST 0x7000001c
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#define SHT_MIPS_DELTACLASS 0x7000001d
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#define SHT_MIPS_DWARF 0x7000001e
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#define SHT_MIPS_DELTADECL 0x7000001f
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#define SHT_MIPS_SYMBOL_LIB 0x70000020
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#define SHT_MIPS_EVENTS 0x70000021
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#define SHT_MIPS_TRANSLATE 0x70000022
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#define SHT_MIPS_PIXIE 0x70000023
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#define SHT_MIPS_XLATE 0x70000024
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#define SHT_MIPS_XLATE_DEBUG 0x70000025
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#define SHT_MIPS_WHIRL 0x70000026
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#define SHT_MIPS_EH_REGION 0x70000027
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#define SHT_MIPS_XLATE_OLD 0x70000028
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#define SHT_MIPS_PDR_EXCEPTION 0x70000029
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#define SHF_MIPS_GPREL 0x10000000
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#define SHF_MIPS_MERGE 0x20000000
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#define SHF_MIPS_ADDR 0x40000000
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#define SHF_MIPS_STRING 0x80000000
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#define SHF_MIPS_NOSTRIP 0x08000000
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#define SHF_MIPS_LOCAL 0x04000000
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#define SHF_MIPS_NAMES 0x02000000
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#define SHF_MIPS_NODUPES 0x01000000
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#ifndef ELF_ARCH
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/* ELF register definitions */
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#define ELF_NGREG 45
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#define ELF_NFPREG 33
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typedef unsigned long elf_greg_t;
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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#ifdef CONFIG_32BIT
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(hdr) \
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({ \
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int __res = 1; \
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struct elfhdr *__h = (hdr); \
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\
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if (__h->e_machine != EM_MIPS) \
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__res = 0; \
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if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
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__res = 0; \
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if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
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__res = 0; \
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if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
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((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
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__res = 0; \
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\
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__res; \
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})
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS32
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#endif /* CONFIG_32BIT */
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#ifdef CONFIG_64BIT
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(hdr) \
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({ \
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int __res = 1; \
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struct elfhdr *__h = (hdr); \
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\
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if (__h->e_machine != EM_MIPS) \
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__res = 0; \
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if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
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__res = 0; \
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\
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__res; \
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})
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS64
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#endif /* CONFIG_64BIT */
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/*
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* These are used to set parameters in the core dumps.
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*/
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#ifdef __MIPSEB__
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#define ELF_DATA ELFDATA2MSB
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#elif defined(__MIPSEL__)
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#define ELF_DATA ELFDATA2LSB
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#endif
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#define ELF_ARCH EM_MIPS
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#endif /* !defined(ELF_ARCH) */
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struct mips_abi;
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extern struct mips_abi mips_abi;
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extern struct mips_abi mips_abi_32;
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extern struct mips_abi mips_abi_n32;
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#ifdef CONFIG_32BIT
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#define SET_PERSONALITY(ex) \
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do { \
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set_personality(PER_LINUX); \
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\
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current->thread.abi = &mips_abi; \
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} while (0)
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#endif /* CONFIG_32BIT */
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#ifdef CONFIG_64BIT
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#ifdef CONFIG_MIPS32_N32
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#define __SET_PERSONALITY32_N32() \
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do { \
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set_thread_flag(TIF_32BIT_ADDR); \
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current->thread.abi = &mips_abi_n32; \
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} while (0)
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#else
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#define __SET_PERSONALITY32_N32() \
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do { } while (0)
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#endif
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#ifdef CONFIG_MIPS32_O32
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#define __SET_PERSONALITY32_O32() \
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do { \
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set_thread_flag(TIF_32BIT_REGS); \
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set_thread_flag(TIF_32BIT_ADDR); \
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current->thread.abi = &mips_abi_32; \
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} while (0)
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#else
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#define __SET_PERSONALITY32_O32() \
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do { } while (0)
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#endif
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#ifdef CONFIG_MIPS32_COMPAT
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#define __SET_PERSONALITY32(ex) \
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do { \
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if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
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((ex).e_flags & EF_MIPS_ABI) == 0) \
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__SET_PERSONALITY32_N32(); \
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else \
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__SET_PERSONALITY32_O32(); \
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} while (0)
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#else
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#define __SET_PERSONALITY32(ex) do { } while (0)
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#endif
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#define SET_PERSONALITY(ex) \
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do { \
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clear_thread_flag(TIF_32BIT_REGS); \
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clear_thread_flag(TIF_32BIT_ADDR); \
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\
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if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
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__SET_PERSONALITY32(ex); \
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else \
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current->thread.abi = &mips_abi; \
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\
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if (current->personality != PER_LINUX32) \
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set_personality(PER_LINUX); \
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} while (0)
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#endif /* CONFIG_64BIT */
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struct task_struct;
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extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
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extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
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extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
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#ifndef ELF_CORE_COPY_REGS
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#define ELF_CORE_COPY_REGS(elf_regs, regs) \
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elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
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#endif
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#ifndef ELF_CORE_COPY_TASK_REGS
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#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
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#endif
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#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
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dump_task_fpu(tsk, elf_fpregs)
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/* This yields a mask that user programs can use to figure out what
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instruction set this cpu supports. This could be done in userspace,
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but it's not easy, and we've already done it here. */
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#define ELF_HWCAP (0)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo.
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For the moment, we have only optimizations for the Intel generations,
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but that could change... */
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#define ELF_PLATFORM (NULL)
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/*
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* See comments in asm-alpha/elf.h, this is the same thing
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* on the MIPS.
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*/
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#define ELF_PLAT_INIT(_r, load_addr) do { \
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_r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
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_r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
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_r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
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_r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
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_r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
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_r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
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_r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
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_r->regs[30] = _r->regs[31] = 0; \
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} while (0)
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#ifndef ELF_ET_DYN_BASE
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#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
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#endif
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#endif /* _ASM_ELF_H */
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