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The Keystone 2 66AK2HK/E/L 1G Ethernet Switch Subsystems contains The Common Platform Time Sync (CPTS) module which is in general compatible with CPTS module found on "legacy" TI AM3/4/5 SoCs. So, the basic support for Keystone 2 CPTS is available by default, but not documented. The Keystone 2 CPTS module supports also some additional features like time sync reference (RFTCLK) clock selection through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module, which is modelled as multiplexer clock. This patch adds missed binding documentation for Keystone 2 66AK2HK/E/L CPTS module. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
266 lines
8.7 KiB
Plaintext
266 lines
8.7 KiB
Plaintext
This document describes the device tree bindings associated with the
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keystone network coprocessor(NetCP) driver support.
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The network coprocessor (NetCP) is a hardware accelerator that processes
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Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
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switch sub-module to send and receive packets. NetCP also includes a packet
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accelerator (PA) module to perform packet classification operations such as
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header matching, and packet modification operations such as checksum
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generation. NetCP can also optionally include a Security Accelerator (SA)
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capable of performing IPSec operations on ingress/egress packets.
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Keystone II SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which
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includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
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per Ethernet port.
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Keystone NetCP driver has a plug-in module architecture where each of the NetCP
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sub-modules exist as a loadable kernel module which plug in to the netcp core.
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These sub-modules are represented as "netcp-devices" in the dts bindings. It is
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mandatory to have the ethernet switch sub-module for the ethernet interface to
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be operational. Any other sub-module like the PA is optional.
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NetCP Ethernet SubSystem Layout:
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-----------------------------
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NetCP subsystem(10G or 1G)
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-----------------------------
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|-> NetCP Devices -> |
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| |-> GBE/XGBE Switch
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| |-> Packet Accelerator
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| |-> Security Accelerator
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|-> NetCP Interfaces -> |
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|-> Ethernet Port 0
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|-> Ethernet Port 1
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|-> Ethernet Port 2
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|-> Ethernet Port 3
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NetCP subsystem properties:
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Required properties:
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- compatible: Should be "ti,netcp-1.0"
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- clocks: phandle to the reference clocks for the subsystem.
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- dma-id: Navigator packet dma instance id.
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- ranges: address range of NetCP (includes, Ethernet SS, PA and SA)
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Optional properties:
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- reg: register location and the size for the following register
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regions in the specified order.
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- Efuse MAC address register
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- dma-coherent: Present if dma operations are coherent
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- big-endian: Keystone devices can be operated in a mode where the DSP is in
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the big endian mode. In such cases enable this option. This
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option should also be enabled if the ARM is operated in
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big endian mode with the DSP in little endian.
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NetCP device properties: Device specification for NetCP sub-modules.
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1Gb/10Gb (gbe/xgbe) ethernet switch sub-module specifications.
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Required properties:
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- label: Must be "netcp-gbe" for 1Gb & "netcp-xgbe" for 10Gb.
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- compatible: Must be one of below:-
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"ti,netcp-gbe" for 1GbE on NetCP 1.4
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"ti,netcp-gbe-5" for 1GbE N NetCP 1.5 (N=5)
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"ti,netcp-gbe-9" for 1GbE N NetCP 1.5 (N=9)
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"ti,netcp-gbe-2" for 1GbE N NetCP 1.5 (N=2)
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"ti,netcp-xgbe" for 10 GbE
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- reg: register location and the size for the following register
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regions in the specified order.
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- switch subsystem registers
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- sgmii port3/4 module registers (only for NetCP 1.4)
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- switch module registers
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- serdes registers (only for 10G)
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NetCP 1.4 ethss, here is the order
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index #0 - switch subsystem registers
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index #1 - sgmii port3/4 module registers
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index #2 - switch module registers
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NetCP 1.5 ethss 9 port, 5 port and 2 port
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index #0 - switch subsystem registers
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index #1 - switch module registers
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index #2 - serdes registers
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- tx-channel: the navigator packet dma channel name for tx.
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- tx-queue: the navigator queue number associated with the tx dma channel.
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- interfaces: specification for each of the switch port to be registered as a
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network interface in the stack.
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-- slave-port: Switch port number, 0 based numbering.
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-- link-interface: type of link interface, supported options are
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- mac<->mac auto negotiate mode: 0
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- mac<->phy mode: 1
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- mac<->mac forced mode: 2
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- mac<->fiber mode: 3
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- mac<->phy mode with no mdio: 4
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- 10Gb mac<->phy mode : 10
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- 10Gb mac<->mac forced mode : 11
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----phy-handle: phandle to PHY device
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- cpts: sub-node time synchronization (CPTS) submodule configuration
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-- clocks: CPTS reference clock. Should point on cpts-refclk-mux clock.
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-- clock-names: should be "cpts"
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-- cpts-refclk-mux: multiplexer clock definition sub-node for CPTS reference (RFTCLK) clock
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--- #clock-cells: should be 0
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--- clocks: list of CPTS reference (RFTCLK) clock's parents as defined in Data manual
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--- ti,mux-tbl: array of multiplexer indexes as defined in Data manual
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--- assigned-clocks: should point on cpts-refclk-mux clock
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--- assigned-clock-parents: should point on required RFTCLK clock parent to be selected
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-- cpts_clock_mult: (optional) Numerator to convert input clock ticks
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into nanoseconds
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-- cpts_clock_shift: (optional) Denominator to convert input clock ticks into
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nanoseconds.
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Mult and shift will be calculated basing on CPTS
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rftclk frequency if both cpts_clock_shift and
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cpts_clock_mult properties are not provided.
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Optional properties:
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- enable-ale: NetCP driver keeps the address learning feature in the ethernet
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switch module disabled. This attribute is to enable the address
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learning.
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- secondary-slave-ports: specification for each of the switch port not be
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registered as a network interface. NetCP driver
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will only initialize these ports and attach PHY
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driver to them if needed.
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NetCP interface properties: Interface specification for NetCP sub-modules.
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Required properties:
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- rx-channel: the navigator packet dma channel name for rx.
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- rx-queue: the navigator queue number associated with rx dma channel.
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- rx-pool: specifies the number of descriptors to be used & the region-id
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for creating the rx descriptor pool.
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- tx-pool: specifies the number of descriptors to be used & the region-id
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for creating the tx descriptor pool.
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- rx-queue-depth: number of descriptors in each of the free descriptor
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queue (FDQ) for the pktdma Rx flow. There can be at
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present a maximum of 4 queues per Rx flow.
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- rx-buffer-size: the buffer size for each of the Rx flow FDQ.
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- tx-completion-queue: the navigator queue number where the descriptors are
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recycled after Tx DMA completion.
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Optional properties:
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- efuse-mac: If this is 1, then the MAC address for the interface is
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obtained from the device efuse mac address register.
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If this is 2, the two DWORDs occupied by the MAC address
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are swapped. The netcp driver will swap the two DWORDs
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back to the proper order when this property is set to 2
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when it obtains the mac address from efuse.
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- "netcp-device label": phandle to the device specification for each of NetCP
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sub-module attached to this interface.
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The MAC address will be determined using the optional properties defined in
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ethernet.txt and only if efuse-mac is set to 0. If all of the optional MAC
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address properties are not present, then the driver will use a random MAC
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address.
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Example binding:
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netcp: netcp@2000000 {
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reg = <0x2620110 0x8>;
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reg-names = "efuse";
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compatible = "ti,netcp-1.0";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x2000000 0xfffff>;
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clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
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dma-coherent;
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/* big-endian; */
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dma-id = <0>;
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netcp-devices {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gbe@90000 {
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label = "netcp-gbe";
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reg = <0x90000 0x300>, <0x90400 0x400>, <0x90800 0x700>;
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/* enable-ale; */
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tx-queue = <648>;
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tx-channel = <8>;
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cpts {
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clocks = <&cpts_refclk_mux>;
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clock-names = "cpts";
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cpts_refclk_mux: cpts-refclk-mux {
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#clock-cells = <0>;
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clocks = <&chipclk12>, <&chipclk13>,
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<&timi0>, <&timi1>,
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<&tsipclka>, <&tsrefclk>,
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<&tsipclkb>;
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ti,mux-tbl = <0x0>, <0x1>, <0x2>,
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<0x3>, <0x4>, <0x8>, <0xC>;
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assigned-clocks = <&cpts_refclk_mux>;
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assigned-clock-parents = <&chipclk12>;
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};
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};
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interfaces {
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gbe0: interface-0 {
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slave-port = <0>;
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link-interface = <4>;
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};
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gbe1: interface-1 {
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slave-port = <1>;
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link-interface = <4>;
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};
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};
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secondary-slave-ports {
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port-2 {
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slave-port = <2>;
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link-interface = <2>;
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};
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port-3 {
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slave-port = <3>;
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link-interface = <2>;
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};
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};
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};
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};
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netcp-interfaces {
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interface-0 {
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rx-channel = <22>;
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rx-pool = <1024 12>;
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tx-pool = <1024 12>;
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rx-queue-depth = <128 128 0 0>;
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rx-buffer-size = <1518 4096 0 0>;
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rx-queue = <8704>;
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tx-completion-queue = <8706>;
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efuse-mac = <1>;
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netcp-gbe = <&gbe0>;
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};
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interface-1 {
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rx-channel = <23>;
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rx-pool = <1024 12>;
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tx-pool = <1024 12>;
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rx-queue-depth = <128 128 0 0>;
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rx-buffer-size = <1518 4096 0 0>;
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rx-queue = <8705>;
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tx-completion-queue = <8707>;
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efuse-mac = <0>;
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local-mac-address = [02 18 31 7e 3e 6f];
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netcp-gbe = <&gbe1>;
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};
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};
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};
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CPTS board configuration - select external CPTS RFTCLK:
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&tsrefclk{
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clock-frequency = <500000000>;
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};
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&cpts_refclk_mux {
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assigned-clock-parents = <&tsrefclk>;
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};
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