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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3250cdf938
When transmitting IEC60985 linear PCM audio, we configure the Aduio Sample Channel Status information in the IEC60958 frame. The status bit is already available in iec.status of hdmi_codec_params. This fix the issue that audio does not come out on some monitors (e.g. LG 22CV241) Note that these registers are only for interfaces: I2S audio interface, General Purpose Audio (GPA), or AHB audio DMA (AHBAUDDMA). For S/PDIF interface this information comes from the stream. Currently this function dw_hdmi_set_channel_status is only called from dw-hdmi-i2s-audio in I2S setup. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190911082646.134347-1-cychiang@chromium.org
222 lines
5.1 KiB
C
222 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* dw-hdmi-i2s-audio.c
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*
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* Copyright (c) 2017 Renesas Solutions Corp.
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* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*/
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <drm/bridge/dw_hdmi.h>
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#include <drm/drm_crtc.h>
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#include <sound/hdmi-codec.h>
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#include "dw-hdmi.h"
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#include "dw-hdmi-audio.h"
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#define DRIVER_NAME "dw-hdmi-i2s-audio"
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static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
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u8 val, int offset)
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{
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struct dw_hdmi *hdmi = audio->hdmi;
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audio->write(hdmi, val, offset);
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}
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static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
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{
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struct dw_hdmi *hdmi = audio->hdmi;
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return audio->read(hdmi, offset);
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}
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static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
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struct hdmi_codec_daifmt *fmt,
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struct hdmi_codec_params *hparms)
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{
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struct dw_hdmi_i2s_audio_data *audio = data;
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struct dw_hdmi *hdmi = audio->hdmi;
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u8 conf0 = 0;
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u8 conf1 = 0;
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u8 inputclkfs = 0;
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/* it cares I2S only */
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if (fmt->bit_clk_master | fmt->frame_clk_master) {
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dev_err(dev, "unsupported clock settings\n");
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return -EINVAL;
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}
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/* Reset the FIFOs before applying new params */
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hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
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hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2SSWRST_REQ, HDMI_MC_SWRSTZ);
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inputclkfs = HDMI_AUD_INPUTCLKFS_64FS;
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conf0 = (HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_EN0);
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/* Enable the required i2s lanes */
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switch (hparms->channels) {
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case 7 ... 8:
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conf0 |= HDMI_AUD_CONF0_I2S_EN3;
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/* Fall-thru */
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case 5 ... 6:
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conf0 |= HDMI_AUD_CONF0_I2S_EN2;
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/* Fall-thru */
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case 3 ... 4:
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conf0 |= HDMI_AUD_CONF0_I2S_EN1;
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/* Fall-thru */
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}
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switch (hparms->sample_width) {
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case 16:
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conf1 = HDMI_AUD_CONF1_WIDTH_16;
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break;
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case 24:
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case 32:
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conf1 = HDMI_AUD_CONF1_WIDTH_24;
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break;
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}
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switch (fmt->fmt) {
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case HDMI_I2S:
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conf1 |= HDMI_AUD_CONF1_MODE_I2S;
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break;
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case HDMI_RIGHT_J:
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conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J;
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break;
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case HDMI_LEFT_J:
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conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J;
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break;
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case HDMI_DSP_A:
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conf1 |= HDMI_AUD_CONF1_MODE_BURST_1;
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break;
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case HDMI_DSP_B:
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conf1 |= HDMI_AUD_CONF1_MODE_BURST_2;
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break;
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default:
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dev_err(dev, "unsupported format\n");
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return -EINVAL;
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}
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dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
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dw_hdmi_set_channel_status(hdmi, hparms->iec.status);
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dw_hdmi_set_channel_count(hdmi, hparms->channels);
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dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation);
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hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
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hdmi_write(audio, conf0, HDMI_AUD_CONF0);
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hdmi_write(audio, conf1, HDMI_AUD_CONF1);
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return 0;
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}
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static int dw_hdmi_i2s_audio_startup(struct device *dev, void *data)
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{
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struct dw_hdmi_i2s_audio_data *audio = data;
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struct dw_hdmi *hdmi = audio->hdmi;
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dw_hdmi_audio_enable(hdmi);
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return 0;
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}
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static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
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{
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struct dw_hdmi_i2s_audio_data *audio = data;
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struct dw_hdmi *hdmi = audio->hdmi;
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dw_hdmi_audio_disable(hdmi);
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}
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static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, uint8_t *buf,
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size_t len)
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{
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struct dw_hdmi_i2s_audio_data *audio = data;
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memcpy(buf, audio->eld, min_t(size_t, MAX_ELD_BYTES, len));
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return 0;
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}
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static int dw_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
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struct device_node *endpoint)
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{
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struct of_endpoint of_ep;
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int ret;
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ret = of_graph_parse_endpoint(endpoint, &of_ep);
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if (ret < 0)
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return ret;
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/*
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* HDMI sound should be located as reg = <2>
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* Then, it is sound port 0
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*/
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if (of_ep.port == 2)
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return 0;
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return -EINVAL;
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}
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static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
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.hw_params = dw_hdmi_i2s_hw_params,
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.audio_startup = dw_hdmi_i2s_audio_startup,
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.audio_shutdown = dw_hdmi_i2s_audio_shutdown,
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.get_eld = dw_hdmi_i2s_get_eld,
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.get_dai_id = dw_hdmi_i2s_get_dai_id,
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};
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static int snd_dw_hdmi_probe(struct platform_device *pdev)
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{
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struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
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struct platform_device_info pdevinfo;
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struct hdmi_codec_pdata pdata;
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struct platform_device *platform;
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pdata.ops = &dw_hdmi_i2s_ops;
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pdata.i2s = 1;
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pdata.max_i2s_channels = 8;
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pdata.data = audio;
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memset(&pdevinfo, 0, sizeof(pdevinfo));
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pdevinfo.parent = pdev->dev.parent;
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pdevinfo.id = PLATFORM_DEVID_AUTO;
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pdevinfo.name = HDMI_CODEC_DRV_NAME;
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pdevinfo.data = &pdata;
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pdevinfo.size_data = sizeof(pdata);
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pdevinfo.dma_mask = DMA_BIT_MASK(32);
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platform = platform_device_register_full(&pdevinfo);
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if (IS_ERR(platform))
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return PTR_ERR(platform);
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dev_set_drvdata(&pdev->dev, platform);
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return 0;
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}
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static int snd_dw_hdmi_remove(struct platform_device *pdev)
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{
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struct platform_device *platform = dev_get_drvdata(&pdev->dev);
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platform_device_unregister(platform);
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return 0;
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}
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static struct platform_driver snd_dw_hdmi_driver = {
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.probe = snd_dw_hdmi_probe,
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.remove = snd_dw_hdmi_remove,
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.driver = {
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.name = DRIVER_NAME,
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},
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};
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module_platform_driver(snd_dw_hdmi_driver);
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MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
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MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRIVER_NAME);
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