linux_dsm_epyc7002/drivers/gpu/drm/i915/display
Imre Deak d156135e6a drm/i915/tgl: Make sure a semiplanar UV plane is tile row size aligned
Currently the GGTT offset of a UV plane in a semiplanar YUV FB is tile
size (4kB) aligned. I noticed, that enforcing only this alignment leads
oddly to random memory corruptions on TGL while scanning out Y-tiled
FBs. This issue can be easily reproduced with a UV plane offset that is
not aligned to the plane's tile row size.

Some experiments showed the correct alignment to be tile row size
indeed. This also makes sense, since the de-tiling fence created for the
object - with its own stride and so "left" and "right" edge - applies to
all the planes in the FB, so each tile row of all planes should be tile
row aligned.

In fact BSpec requires this alignment since SKL. On SKL we may enforce
this due to the AUX plane x,y coords check, but on ICL and TGL we don't.
For now enforce this only on TGL; I can follow up with any necessary
change for ICL after more tests.

BSpec requires a stricter alignment for linear UV planes too (kind of a
tile row alignment), but it's unclear whether that's really needed
(couldn't be explained with the de-tiling fence as above) and enforcing
that could break existing user space; so avoid that too for now until
more tests.

v2:
- Clarify the commit log wrt. the address space the alignment applies to.
  (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191231233756.18753-3-imre.deak@intel.com
2020-01-07 13:15:21 +02:00
..
dvo_ch7xxx.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ch7017.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ivch.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ns2501.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_sil164.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_tfp410.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
icl_dsi.c drm/i915: prefer 3-letter acronym for skylake 2019-12-28 13:37:59 -08:00
intel_acpi.c
intel_acpi.h
intel_atomic_plane.c drm/i915: Make sure CCS YUV semiplanar format checks work 2019-12-23 13:51:02 +02:00
intel_atomic_plane.h drm/i915: Remove special case slave handling during hw programming, v3. 2019-11-01 14:51:21 +01:00
intel_atomic.c drm/i915/tgl: Select master transcoder for MST stream 2019-12-23 09:26:41 -08:00
intel_atomic.h drm/i915/tgl: Select master transcoder for MST stream 2019-12-23 09:26:41 -08:00
intel_audio.c drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only 2020-01-06 08:45:35 -08:00
intel_audio.h
intel_bios.c drm/i915/bios: remove extra debug messages 2019-12-13 14:36:06 -08:00
intel_bios.h drm/i915/bios: add support for querying DSC details for encoder 2019-12-11 07:39:47 +02:00
intel_bw.c drm/i915/display: cleanup intel_bw_state on i915 module removal 2019-12-24 15:01:50 +05:30
intel_bw.h drm/i915/display: cleanup intel_bw_state on i915 module removal 2019-12-24 15:01:50 +05:30
intel_cdclk.c drm/i915/ehl: Update voltage level checks 2019-11-18 21:07:04 -08:00
intel_cdclk.h drm/i915: Extract intel_modeset_calc_cdclk() 2019-09-16 14:51:09 +03:00
intel_color.c drm/i915: Preload LUTs if the hw isn't currently using them 2019-11-11 11:44:43 +02:00
intel_color.h drm/i915/display: Add func to compare hw/sw gamma lut 2019-09-04 11:55:30 +03:00
intel_combo_phy.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_combo_phy.h drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace 2019-07-10 18:22:34 -07:00
intel_connector.c drm/i915/dp: Attach colorspace property 2019-10-15 16:24:59 +03:00
intel_connector.h
intel_crt.c drm/i915: prefer 3-letter acronym for ironlake 2019-12-28 13:38:03 -08:00
intel_crt.h
intel_ddi.c drm/i915/dp: Disable Port sync mode correctly on teardown 2019-12-30 00:16:07 -08:00
intel_ddi.h drm/i915: Call hsw_fdi_link_train() directly() 2019-12-18 16:47:34 +02:00
intel_display_power.c drm/i915/icl: Cleanup combo PHY aux power well handlers 2019-12-13 12:06:34 -08:00
intel_display_power.h drm/i915: fix comment for POWER_DOMAIN_TRANSCODER_VDSC_PW2 2019-12-23 11:58:49 +02:00
intel_display_types.h drm/i915/tgl: Select master transcoder for MST stream 2019-12-23 09:26:41 -08:00
intel_display.c drm/i915/tgl: Make sure a semiplanar UV plane is tile row size aligned 2020-01-07 13:15:21 +02:00
intel_display.h drm/i915: prefer 3-letter acronym for ironlake 2019-12-28 13:38:03 -08:00
intel_dp_aux_backlight.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dp_aux_backlight.h
intel_dp_link_training.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dp_link_training.h
intel_dp_mst.c drm/i915: prefer 3-letter acronym for ironlake 2019-12-28 13:38:03 -08:00
intel_dp_mst.h drm/i915/tgl: Select master transcoder for MST stream 2019-12-23 09:26:41 -08:00
intel_dp.c drm/i915: prefer 3-letter acronym for ironlake 2019-12-28 13:38:03 -08:00
intel_dp.h drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata 2019-10-15 16:24:59 +03:00
intel_dpio_phy.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_dpio_phy.h
intel_dpll_mgr.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_dpll_mgr.h drm/i915: Describe structure member in documentation 2019-10-25 12:06:26 +01:00
intel_dsb.c drm/i915/dsb: fix cmd_buf being wrongly set 2019-12-02 10:06:25 -08:00
intel_dsb.h drm/i915/dsb: remove atomic operations 2019-11-18 13:27:09 -08:00
intel_dsi_dcs_backlight.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dsi_dcs_backlight.h
intel_dsi_vbt.c drm/i915/dsi: Control panel and backlight enable GPIOs on BYT 2020-01-03 11:47:01 +01:00
intel_dsi.c drm/i915: Don't advertise modes that exceed the max plane size 2019-09-19 20:28:57 +03:00
intel_dsi.h drm/i915/dsi: Control panel and backlight enable GPIOs on BYT 2020-01-03 11:47:01 +01:00
intel_dvo_dev.h
intel_dvo.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_dvo.h
intel_fbc.c drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too 2019-12-19 22:18:26 +02:00
intel_fbc.h drm/i915/fbc: Wait for vblank after FBC disable on glk+ 2019-12-09 16:10:58 +02:00
intel_fbdev.c drm/i915/fbdev: Restore physical addresses for fb_mmap() 2019-11-14 12:16:13 +00:00
intel_fbdev.h
intel_fifo_underrun.c drm/i915: prefer 3-letter acronym for ivybridge 2019-12-28 13:38:08 -08:00
intel_fifo_underrun.h
intel_frontbuffer.c drm/i915: Hold reference to intel_frontbuffer as we track activity 2019-12-18 12:09:57 +00:00
intel_frontbuffer.h drm/i915: Hold reference to intel_frontbuffer as we track activity 2019-12-18 12:09:57 +00:00
intel_gmbus.c drm/i915: introduce INTEL_DISPLAY_ENABLED() 2019-09-16 10:20:05 +03:00
intel_gmbus.h drm/i915: Move gmbus definitions out of i915_reg.h 2019-08-16 21:52:49 +01:00
intel_hdcp.c drm/i915/hdcp: Nuke intel_hdcp_transcoder_config() 2019-12-09 17:49:39 +02:00
intel_hdcp.h drm/i915/hdcp: Nuke intel_hdcp_transcoder_config() 2019-12-09 17:49:39 +02:00
intel_hdmi.c drm/i915: Provide ddc symlink in hdmi connector sysfs directory 2019-12-19 15:07:03 +02:00
intel_hdmi.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_hotplug.c drm/i915: Prefer encoder->name over port_name() 2019-09-02 18:43:28 +03:00
intel_hotplug.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_lpe_audio.c drm/i915: add INTEL_NUM_PIPES() and use it 2019-09-11 22:33:20 +03:00
intel_lpe_audio.h
intel_lspcon.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw. 2019-11-01 14:51:20 +01:00
intel_lspcon.h
intel_lvds.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_lvds.h
intel_opregion.c drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug 2019-12-16 21:38:05 +01:00
intel_opregion.h
intel_overlay.c drm/i915/gt: Pull GT initialisation under intel_gt_init() 2019-12-22 12:51:32 +00:00
intel_overlay.h
intel_panel.c drm/i915: DSI: select correct PWM controller to use based on the VBT 2019-12-17 11:24:48 +01:00
intel_panel.h
intel_pipe_crc.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_pipe_crc.h
intel_psr.c drm/i915/psr: Check if sink PSR capability changed 2019-12-02 12:06:15 -08:00
intel_psr.h drm/i915: Do not unmask PSR interruption in IRQ postinstall 2019-08-22 13:09:24 -07:00
intel_quirks.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_quirks.h
intel_sdvo_regs.h
intel_sdvo.c drm/i915: Drop redundant aspec ratio prop value initialization 2019-11-14 19:49:19 +02:00
intel_sdvo.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_sprite.c drm/i915: Make sure CCS YUV semiplanar format checks work 2019-12-23 13:51:02 +02:00
intel_sprite.h drm/i915: Allow planes to declare their minimum acceptable cdclk 2019-10-24 21:22:25 +03:00
intel_tc.c drm/i915/tc: Update DP_MODE programming 2019-09-27 10:40:17 -07:00
intel_tc.h drm/i915/tc: Update DP_MODE programming 2019-09-27 10:40:17 -07:00
intel_tv.c drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. 2019-11-01 14:51:21 +01:00
intel_tv.h
intel_vbt_defs.h drm/i915/bios: parse compression parameters block 2019-12-11 07:39:41 +02:00
intel_vdsc.c drm/i915/dsc: fix DSC power domains for DSI 2019-12-19 15:24:03 +02:00
intel_vdsc.h drm/i915/dsc: add basic hardware state readout support 2019-12-11 08:16:16 +02:00
intel_vga.c drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() 2019-10-06 11:24:53 +03:00
intel_vga.h drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() 2019-10-06 11:24:53 +03:00
vlv_dsi_pll.c drm/i915: Wrappers for display register waits 2019-08-16 22:19:05 +01:00
vlv_dsi.c drm/i915/dsi: Init panel-enable GPIO to low when the LCD is initially off (v2) 2020-01-03 11:46:59 +01:00