linux_dsm_epyc7002/drivers/gpu
Damien Lespiau d14c034313 drm/i915/skl: Restore pipe interrupt registers after power well enabling
The pipe interrupt registers are in the actual pipe power well, so we
need to restore them when re-enable the corresponding power well.

I've also copied what we do on HSW/BDW for VGA, even if the we haven't
enabled unclaimed registers just yet.

v2: Don't run skl_power_well_post_enable() if the power well is already
    enabled (Paulo)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-03-17 22:30:07 +01:00
..
drm drm/i915/skl: Restore pipe interrupt registers after power well enabling 2015-03-17 22:30:07 +01:00
host1x gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00
ipu-v3 gpu: ipu-v3: do not divide by zero if the pixel clock is too large 2015-02-23 17:18:59 +01:00
vga Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-10-13 16:23:15 +02:00
Makefile gpu: host1x: Provide a proper struct bus_type 2015-01-27 10:09:14 +01:00