AuxXxilium/linux_dsm_epyc7002
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linux_dsm_epyc7002/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
Andrew Jeffery 37ece7e341 ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfaces 
We need to ungate RCLK on AST2500- and AST2600-based platforms for RMII
to function. RMII interfaces are commonly used for NCSI.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01 20:54:45 +10:30

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// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
// Author: Vijay Khemka <vijaykhemka@fb.com>
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Facebook TiogaPass BMC";
compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
aliases {
serial0 = &uart1;
serial4 = &uart5;
/*
* Hardcode the bus number of i2c switches' channels to
* avoid breaking the legacy applications.
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&lpc_ctrl {
// Enable lpc clock
status = "okay";
};
&vuart {
// VUART Host Console
status = "okay";
};
&uart1 {
// Host Console
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
// SoL Host Console
status = "okay";
};
&uart3 {
// SoL BMC Console
status = "okay";
};
&uart5 {
// BMC Console
status = "okay";
};
&kcs2 {
// BMC KCS channel 2
status = "okay";
kcs_addr = <0xca8>;
};
&kcs3 {
// BMC KCS channel 3
status = "okay";
kcs_addr = <0xca2>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&adc {
status = "okay";
};
&i2c0 {
status = "okay";
//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
};
&i2c1 {
status = "okay";
//X24 Riser
i2c-switch@71 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x71>;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp75@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux20: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux21: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux22: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux23: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp421@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp421@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux28: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux29: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux30: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux31: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
i2c-switch@40 {
compatible = "ti,ina230";
reg = <0x40>;
};
i2c-switch@41 {
compatible = "ti,ina230";
reg = <0x41>;
};
i2c-switch@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
};
};
};
&i2c2 {
status = "okay";
// Mezz Management SMBus
};
&i2c3 {
status = "okay";
// SMBus to Board ID EEPROM
};
&i2c4 {
status = "okay";
// BMC Debug Header
};
&i2c5 {
status = "okay";
// CPU Voltage regulators
regulator@48 {
compatible = "infineon,pxe1610";
reg = <0x48>;
};
regulator@4a {
compatible = "infineon,pxe1610";
reg = <0x4a>;
};
regulator@50 {
compatible = "infineon,pxe1610";
reg = <0x50>;
};
regulator@52 {
compatible = "infineon,pxe1610";
reg = <0x52>;
};
regulator@58 {
compatible = "infineon,pxe1610";
reg = <0x58>;
};
regulator@5a {
compatible = "infineon,pxe1610";
reg = <0x5a>;
};
regulator@68 {
compatible = "infineon,pxe1610";
reg = <0x68>;
};
regulator@70 {
compatible = "infineon,pxe1610";
reg = <0x70>;
};
regulator@72 {
compatible = "infineon,pxe1610";
reg = <0x72>;
};
};
&i2c6 {
status = "okay";
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
tmp421@4e {
compatible = "ti,tmp421";
reg = <0x4e>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
};
};
&i2c7 {
status = "okay";
//HSC, AirMax Conn A
};
&i2c8 {
status = "okay";
tmp421@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
//Mezz Sensor SMBus
};
&i2c9 {
status = "okay";
//USB Debug Connector
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
};
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