Thomas Gleixner 9e90c79852 irqchip updates for 4.19 ... - GICv3 ITS LPI allocation revamp - GICv3 support for hypervisor-enforced LPI range - GICv3 ITS conversion to raw spinlock -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAltoBXMVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDyUYP/1feAq3F7ZmhCIZka4c6y/m4EBpq BjWEEgOAGMEyyB4s98flsRtZcEUxxp6CqEXo2FgCsd1Nj+og7oA7vwOlqy3aGzsi 9f/Z5Wi6SlG06lH5tmYNkyVbGk2tE3s2FzkH5Rg8qZGk+X3OCOdNs/+G20pYAkSp ESePWSapbQUJSExJ1MqzfdHFidtVA1V+ev8BKdIp2ykl1NRae8LJeKHIbqac49Ym JclfCLFpQM1M1ElB9j0E8hAvZhz10oOz7TtBR737O/1QEifVyFqGBckPzldvwIJM zZ+nR+Yzj1ruD109xwaF1iKy9AinZWhiqrtN7UXJ3jwHtNih+sy0R6FQ38GMNoOC 0K02n/qStR5xglGr4BmAcWlOuFtBYWfz6HpSVMqaTWWmOxHEiqS6pXtEA+dV/YyI wHLbo0YzpWTQm6t1+b/PoByAJ0/hOcD1nOD57b+NGjX7tZV0sGjpGsecvFhTSywh BN3COBi9k/FOBrOTGDX1qUAI+mEf76vc2BAC+BkkoiiMg3WlY0E9qfQJguUxHdrb 0LS3lDZoHCNoz8RZLrUyenTT0NYGcjPGUTinMDJWG79VGXOWFexTDdCuX0kF90CK 1Zie3O6lrTYolmaiyLUxwukKp1SVUyoA5IpKVwfDJQYUhEfk27yvlzg2MBMcHDRA uy3QSkmjx9vw/sAu =gKw8 -----END PGP SIGNATURE----- Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates from Marc Zyngier: - GICv3 ITS LPI allocation revamp - GICv3 support for hypervisor-enforced LPI range - GICv3 ITS conversion to raw spinlock		2018-08-06 12:45:42 +02:00
..
boot/dts	DeviceTree for 4.15:	2017-11-14 18:25:40 -08:00
configs	openrisc: add simple_smp dts and defconfig for simulators	2017-11-03 14:01:15 +09:00
include	irqchip updates for 4.19	2018-08-06 12:45:42 +02:00
kernel	irqchip updates for 4.19	2018-08-06 12:45:42 +02:00
lib	OpenRISC updates for v4.15	2017-11-13 12:12:00 -08:00
mm	signal/openrisc: Use force_sig_fault where appropriate	2018-04-25 10:44:05 -05:00
Kconfig	openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER	2018-08-03 12:14:09 +02:00
Makefile	kbuild: add endianness flag to CHEKCFLAGS	2018-05-29 22:05:08 +09:00