mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 20:55:22 +07:00
bbef98ab0f
All the PCI BARs of a device are enabled when the device is enabled using pci_enable_device(). This unnecessarily enables SRIOV BARs of the device. On some platforms, which do not support SRIOV as yet, the pci_enable_device() fails to enable the device if its SRIOV BARs are not allocated resources correctly. The following patch fixes the above problem. The SRIOV BARs are now enabled when IOV capability of the device is enabled in sriov_enable(). NOTE: Note, there is subtle change in the pci_enable_device() API. Any driver that depends on SRIOV BARS to be enabled in pci_enable_device() can fail. The patch has been touch tested on power and x86 platform. Tested-by: Michael Wang <wangyun@linux.vnet.ibm.com> Signed-off-by: Ram Pai <linuxram@us.ibm.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
733 lines
16 KiB
C
733 lines
16 KiB
C
/*
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* drivers/pci/iov.c
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*
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* Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
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*
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* PCI Express I/O Virtualization (IOV) support.
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* Single Root IOV 1.0
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* Address Translation Service 1.0
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*/
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/pci-ats.h>
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#include "pci.h"
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#define VIRTFN_ID_LEN 16
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static inline u8 virtfn_bus(struct pci_dev *dev, int id)
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{
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return dev->bus->number + ((dev->devfn + dev->sriov->offset +
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dev->sriov->stride * id) >> 8);
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}
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static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
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{
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return (dev->devfn + dev->sriov->offset +
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dev->sriov->stride * id) & 0xff;
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}
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static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
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{
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int rc;
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struct pci_bus *child;
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if (bus->number == busnr)
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return bus;
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child = pci_find_bus(pci_domain_nr(bus), busnr);
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if (child)
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return child;
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child = pci_add_new_bus(bus, NULL, busnr);
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if (!child)
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return NULL;
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child->subordinate = busnr;
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child->dev.parent = bus->bridge;
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rc = pci_bus_add_child(child);
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if (rc) {
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pci_remove_bus(child);
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return NULL;
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}
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return child;
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}
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static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
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{
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struct pci_bus *child;
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if (bus->number == busnr)
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return;
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child = pci_find_bus(pci_domain_nr(bus), busnr);
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BUG_ON(!child);
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if (list_empty(&child->devices))
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pci_remove_bus(child);
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}
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static int virtfn_add(struct pci_dev *dev, int id, int reset)
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{
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int i;
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int rc;
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u64 size;
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char buf[VIRTFN_ID_LEN];
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struct pci_dev *virtfn;
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struct resource *res;
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struct pci_sriov *iov = dev->sriov;
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virtfn = alloc_pci_dev();
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if (!virtfn)
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return -ENOMEM;
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mutex_lock(&iov->dev->sriov->lock);
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virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
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if (!virtfn->bus) {
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kfree(virtfn);
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mutex_unlock(&iov->dev->sriov->lock);
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return -ENOMEM;
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}
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virtfn->devfn = virtfn_devfn(dev, id);
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virtfn->vendor = dev->vendor;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
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pci_setup_device(virtfn);
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virtfn->dev.parent = dev->dev.parent;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = dev->resource + PCI_IOV_RESOURCES + i;
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if (!res->parent)
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continue;
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virtfn->resource[i].name = pci_name(virtfn);
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virtfn->resource[i].flags = res->flags;
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size = resource_size(res);
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do_div(size, iov->total);
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virtfn->resource[i].start = res->start + size * id;
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virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
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rc = request_resource(res, &virtfn->resource[i]);
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BUG_ON(rc);
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}
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if (reset)
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__pci_reset_function(virtfn);
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pci_device_add(virtfn, virtfn->bus);
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mutex_unlock(&iov->dev->sriov->lock);
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virtfn->physfn = pci_dev_get(dev);
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virtfn->is_virtfn = 1;
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rc = pci_bus_add_device(virtfn);
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if (rc)
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goto failed1;
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sprintf(buf, "virtfn%u", id);
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rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
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if (rc)
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goto failed1;
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rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
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if (rc)
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goto failed2;
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kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
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return 0;
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failed2:
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sysfs_remove_link(&dev->dev.kobj, buf);
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failed1:
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pci_dev_put(dev);
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mutex_lock(&iov->dev->sriov->lock);
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pci_remove_bus_device(virtfn);
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virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
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mutex_unlock(&iov->dev->sriov->lock);
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return rc;
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}
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static void virtfn_remove(struct pci_dev *dev, int id, int reset)
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{
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char buf[VIRTFN_ID_LEN];
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struct pci_bus *bus;
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struct pci_dev *virtfn;
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struct pci_sriov *iov = dev->sriov;
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bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
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if (!bus)
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return;
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virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
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if (!virtfn)
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return;
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pci_dev_put(virtfn);
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if (reset) {
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device_release_driver(&virtfn->dev);
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__pci_reset_function(virtfn);
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}
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sprintf(buf, "virtfn%u", id);
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sysfs_remove_link(&dev->dev.kobj, buf);
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sysfs_remove_link(&virtfn->dev.kobj, "physfn");
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mutex_lock(&iov->dev->sriov->lock);
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pci_remove_bus_device(virtfn);
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virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
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mutex_unlock(&iov->dev->sriov->lock);
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pci_dev_put(dev);
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}
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static int sriov_migration(struct pci_dev *dev)
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{
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u16 status;
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struct pci_sriov *iov = dev->sriov;
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if (!iov->nr_virtfn)
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return 0;
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if (!(iov->cap & PCI_SRIOV_CAP_VFM))
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return 0;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
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if (!(status & PCI_SRIOV_STATUS_VFM))
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return 0;
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schedule_work(&iov->mtask);
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return 1;
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}
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static void sriov_migration_task(struct work_struct *work)
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{
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int i;
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u8 state;
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u16 status;
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struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
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for (i = iov->initial; i < iov->nr_virtfn; i++) {
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state = readb(iov->mstate + i);
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if (state == PCI_SRIOV_VFM_MI) {
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writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
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state = readb(iov->mstate + i);
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if (state == PCI_SRIOV_VFM_AV)
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virtfn_add(iov->self, i, 1);
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} else if (state == PCI_SRIOV_VFM_MO) {
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virtfn_remove(iov->self, i, 1);
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writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
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state = readb(iov->mstate + i);
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if (state == PCI_SRIOV_VFM_AV)
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virtfn_add(iov->self, i, 0);
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}
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}
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pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
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status &= ~PCI_SRIOV_STATUS_VFM;
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pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
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}
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static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
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{
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int bir;
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u32 table;
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resource_size_t pa;
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struct pci_sriov *iov = dev->sriov;
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if (nr_virtfn <= iov->initial)
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return 0;
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pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
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bir = PCI_SRIOV_VFM_BIR(table);
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if (bir > PCI_STD_RESOURCE_END)
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return -EIO;
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table = PCI_SRIOV_VFM_OFFSET(table);
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if (table + nr_virtfn > pci_resource_len(dev, bir))
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return -EIO;
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pa = pci_resource_start(dev, bir) + table;
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iov->mstate = ioremap(pa, nr_virtfn);
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if (!iov->mstate)
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return -ENOMEM;
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INIT_WORK(&iov->mtask, sriov_migration_task);
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iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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return 0;
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}
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static void sriov_disable_migration(struct pci_dev *dev)
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{
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struct pci_sriov *iov = dev->sriov;
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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cancel_work_sync(&iov->mtask);
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iounmap(iov->mstate);
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}
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static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
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{
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int rc;
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int i, j;
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int nres;
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u16 offset, stride, initial;
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struct resource *res;
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struct pci_dev *pdev;
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struct pci_sriov *iov = dev->sriov;
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int bars = 0;
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if (!nr_virtfn)
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return 0;
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if (iov->nr_virtfn)
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return -EINVAL;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
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if (initial > iov->total ||
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(!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
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return -EIO;
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if (nr_virtfn < 0 || nr_virtfn > iov->total ||
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(!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
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return -EINVAL;
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (nr_virtfn > 1 && !stride))
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return -EIO;
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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bars |= (1 << (i + PCI_IOV_RESOURCES));
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res = dev->resource + PCI_IOV_RESOURCES + i;
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if (res->parent)
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nres++;
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}
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if (nres != iov->nres) {
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dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
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return -ENOMEM;
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}
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iov->offset = offset;
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iov->stride = stride;
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if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
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dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
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return -ENOMEM;
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}
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if (pci_enable_resources(dev, bars)) {
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dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
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return -ENOMEM;
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}
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if (iov->link != dev->devfn) {
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pdev = pci_get_slot(dev->bus, iov->link);
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if (!pdev)
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return -ENODEV;
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pci_dev_put(pdev);
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if (!pdev->is_physfn)
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return -ENODEV;
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rc = sysfs_create_link(&dev->dev.kobj,
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&pdev->dev.kobj, "dep_link");
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if (rc)
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return rc;
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}
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iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
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pci_block_user_cfg_access(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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msleep(100);
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pci_unblock_user_cfg_access(dev);
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iov->initial = initial;
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if (nr_virtfn < initial)
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initial = nr_virtfn;
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for (i = 0; i < initial; i++) {
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rc = virtfn_add(dev, i, 0);
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if (rc)
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goto failed;
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}
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if (iov->cap & PCI_SRIOV_CAP_VFM) {
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rc = sriov_enable_migration(dev, nr_virtfn);
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if (rc)
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goto failed;
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}
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kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
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iov->nr_virtfn = nr_virtfn;
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return 0;
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failed:
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for (j = 0; j < i; j++)
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virtfn_remove(dev, j, 0);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_block_user_cfg_access(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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ssleep(1);
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pci_unblock_user_cfg_access(dev);
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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return rc;
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}
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static void sriov_disable(struct pci_dev *dev)
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{
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int i;
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struct pci_sriov *iov = dev->sriov;
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if (!iov->nr_virtfn)
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return;
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if (iov->cap & PCI_SRIOV_CAP_VFM)
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sriov_disable_migration(dev);
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for (i = 0; i < iov->nr_virtfn; i++)
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virtfn_remove(dev, i, 0);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_block_user_cfg_access(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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ssleep(1);
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pci_unblock_user_cfg_access(dev);
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|
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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iov->nr_virtfn = 0;
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}
|
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|
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static int sriov_init(struct pci_dev *dev, int pos)
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{
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int i;
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int rc;
|
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int nres;
|
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u32 pgsz;
|
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u16 ctrl, total, offset, stride;
|
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struct pci_sriov *iov;
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struct resource *res;
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struct pci_dev *pdev;
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if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
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dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
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return -ENODEV;
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pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
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if (ctrl & PCI_SRIOV_CTRL_VFE) {
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
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ssleep(1);
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}
|
|
|
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pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
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if (!total)
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return 0;
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ctrl = 0;
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list_for_each_entry(pdev, &dev->bus->devices, bus_list)
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if (pdev->is_physfn)
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goto found;
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pdev = NULL;
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if (pci_ari_enabled(dev->bus))
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ctrl |= PCI_SRIOV_CTRL_ARI;
|
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|
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found:
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
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pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
|
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (total > 1 && !stride))
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return -EIO;
|
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|
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pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
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i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
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pgsz &= ~((1 << i) - 1);
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if (!pgsz)
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return -EIO;
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|
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pgsz &= ~(pgsz - 1);
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pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = dev->resource + PCI_IOV_RESOURCES + i;
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i += __pci_read_base(dev, pci_bar_unknown, res,
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pos + PCI_SRIOV_BAR + i * 4);
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if (!res->flags)
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continue;
|
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if (resource_size(res) & (PAGE_SIZE - 1)) {
|
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rc = -EIO;
|
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goto failed;
|
|
}
|
|
res->end = res->start + resource_size(res) * total - 1;
|
|
nres++;
|
|
}
|
|
|
|
iov = kzalloc(sizeof(*iov), GFP_KERNEL);
|
|
if (!iov) {
|
|
rc = -ENOMEM;
|
|
goto failed;
|
|
}
|
|
|
|
iov->pos = pos;
|
|
iov->nres = nres;
|
|
iov->ctrl = ctrl;
|
|
iov->total = total;
|
|
iov->offset = offset;
|
|
iov->stride = stride;
|
|
iov->pgsz = pgsz;
|
|
iov->self = dev;
|
|
pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
|
|
pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
|
|
if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
|
|
iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
|
|
|
|
if (pdev)
|
|
iov->dev = pci_dev_get(pdev);
|
|
else
|
|
iov->dev = dev;
|
|
|
|
mutex_init(&iov->lock);
|
|
|
|
dev->sriov = iov;
|
|
dev->is_physfn = 1;
|
|
|
|
return 0;
|
|
|
|
failed:
|
|
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
|
|
res = dev->resource + PCI_IOV_RESOURCES + i;
|
|
res->flags = 0;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void sriov_release(struct pci_dev *dev)
|
|
{
|
|
BUG_ON(dev->sriov->nr_virtfn);
|
|
|
|
if (dev != dev->sriov->dev)
|
|
pci_dev_put(dev->sriov->dev);
|
|
|
|
mutex_destroy(&dev->sriov->lock);
|
|
|
|
kfree(dev->sriov);
|
|
dev->sriov = NULL;
|
|
}
|
|
|
|
static void sriov_restore_state(struct pci_dev *dev)
|
|
{
|
|
int i;
|
|
u16 ctrl;
|
|
struct pci_sriov *iov = dev->sriov;
|
|
|
|
pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
|
|
if (ctrl & PCI_SRIOV_CTRL_VFE)
|
|
return;
|
|
|
|
for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
|
|
pci_update_resource(dev, i);
|
|
|
|
pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
|
|
pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn);
|
|
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
|
|
if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
|
|
msleep(100);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_init - initialize the IOV capability
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns 0 on success, or negative on failure.
|
|
*/
|
|
int pci_iov_init(struct pci_dev *dev)
|
|
{
|
|
int pos;
|
|
|
|
if (!pci_is_pcie(dev))
|
|
return -ENODEV;
|
|
|
|
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
|
|
if (pos)
|
|
return sriov_init(dev, pos);
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
/**
|
|
* pci_iov_release - release resources used by the IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_iov_release(struct pci_dev *dev)
|
|
{
|
|
if (dev->is_physfn)
|
|
sriov_release(dev);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_resource_bar - get position of the SR-IOV BAR
|
|
* @dev: the PCI device
|
|
* @resno: the resource number
|
|
* @type: the BAR type to be filled in
|
|
*
|
|
* Returns position of the BAR encapsulated in the SR-IOV capability.
|
|
*/
|
|
int pci_iov_resource_bar(struct pci_dev *dev, int resno,
|
|
enum pci_bar_type *type)
|
|
{
|
|
if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
|
|
return 0;
|
|
|
|
BUG_ON(!dev->is_physfn);
|
|
|
|
*type = pci_bar_unknown;
|
|
|
|
return dev->sriov->pos + PCI_SRIOV_BAR +
|
|
4 * (resno - PCI_IOV_RESOURCES);
|
|
}
|
|
|
|
/**
|
|
* pci_sriov_resource_alignment - get resource alignment for VF BAR
|
|
* @dev: the PCI device
|
|
* @resno: the resource number
|
|
*
|
|
* Returns the alignment of the VF BAR found in the SR-IOV capability.
|
|
* This is not the same as the resource size which is defined as
|
|
* the VF BAR size multiplied by the number of VFs. The alignment
|
|
* is just the VF BAR size.
|
|
*/
|
|
resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
|
|
{
|
|
struct resource tmp;
|
|
enum pci_bar_type type;
|
|
int reg = pci_iov_resource_bar(dev, resno, &type);
|
|
|
|
if (!reg)
|
|
return 0;
|
|
|
|
__pci_read_base(dev, type, &tmp, reg);
|
|
return resource_alignment(&tmp);
|
|
}
|
|
|
|
/**
|
|
* pci_restore_iov_state - restore the state of the IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_restore_iov_state(struct pci_dev *dev)
|
|
{
|
|
if (dev->is_physfn)
|
|
sriov_restore_state(dev);
|
|
}
|
|
|
|
/**
|
|
* pci_iov_bus_range - find bus range used by Virtual Function
|
|
* @bus: the PCI bus
|
|
*
|
|
* Returns max number of buses (exclude current one) used by Virtual
|
|
* Functions.
|
|
*/
|
|
int pci_iov_bus_range(struct pci_bus *bus)
|
|
{
|
|
int max = 0;
|
|
u8 busnr;
|
|
struct pci_dev *dev;
|
|
|
|
list_for_each_entry(dev, &bus->devices, bus_list) {
|
|
if (!dev->is_physfn)
|
|
continue;
|
|
busnr = virtfn_bus(dev, dev->sriov->total - 1);
|
|
if (busnr > max)
|
|
max = busnr;
|
|
}
|
|
|
|
return max ? max - bus->number : 0;
|
|
}
|
|
|
|
/**
|
|
* pci_enable_sriov - enable the SR-IOV capability
|
|
* @dev: the PCI device
|
|
* @nr_virtfn: number of virtual functions to enable
|
|
*
|
|
* Returns 0 on success, or negative on failure.
|
|
*/
|
|
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
|
|
{
|
|
might_sleep();
|
|
|
|
if (!dev->is_physfn)
|
|
return -ENODEV;
|
|
|
|
return sriov_enable(dev, nr_virtfn);
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_enable_sriov);
|
|
|
|
/**
|
|
* pci_disable_sriov - disable the SR-IOV capability
|
|
* @dev: the PCI device
|
|
*/
|
|
void pci_disable_sriov(struct pci_dev *dev)
|
|
{
|
|
might_sleep();
|
|
|
|
if (!dev->is_physfn)
|
|
return;
|
|
|
|
sriov_disable(dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_disable_sriov);
|
|
|
|
/**
|
|
* pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
|
|
*
|
|
* Physical Function driver is responsible to register IRQ handler using
|
|
* VF Migration Interrupt Message Number, and call this function when the
|
|
* interrupt is generated by the hardware.
|
|
*/
|
|
irqreturn_t pci_sriov_migration(struct pci_dev *dev)
|
|
{
|
|
if (!dev->is_physfn)
|
|
return IRQ_NONE;
|
|
|
|
return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_sriov_migration);
|
|
|
|
/**
|
|
* pci_num_vf - return number of VFs associated with a PF device_release_driver
|
|
* @dev: the PCI device
|
|
*
|
|
* Returns number of VFs, or 0 if SR-IOV is not enabled.
|
|
*/
|
|
int pci_num_vf(struct pci_dev *dev)
|
|
{
|
|
if (!dev || !dev->is_physfn)
|
|
return 0;
|
|
else
|
|
return dev->sriov->nr_virtfn;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_num_vf);
|