Andrew Lunn 322a8e9184 PCI: mvebu: Use Device ID and revision from underlying endpoint ... Marvell SoCs place the SoC number into the PCIe endpoint device ID. The SoC stepping is placed into the PCIe revision. The old plat-orion PCIe driver allowed this information to be seen in user space with a simple lspci command. The new driver places a virtual PCI-PCI bridge on top of these endpoints. It has its own hard coded PCI device ID. Thus it is no longer possible to see what the SoC is using lspci. When initializing the PCI-PCI bridge, set its device ID and revision from the underlying endpoint, thus restoring this functionality. Debian would like to use this in order to aid installing the correct DTB file. Fixes: 45361a4fe4 ("pci: PCIe driver for Marvell Armada 370/XP systems") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: stable@vger.kernel.org # v3.11+		2014-02-12 14:05:54 -07:00
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Kconfig
Makefile
pci-exynos.c	PCI: designware: Add dw_pcie prefix before cfg_read/write	2013-12-20 09:18:31 -07:00
pci-imx6.c	PCI: imx6: Fix bugs in PCIe startup code	2013-12-19 11:02:34 -07:00
pci-mvebu.c	PCI: mvebu: Use Device ID and revision from underlying endpoint	2014-02-12 14:05:54 -07:00
pci-rcar-gen2.c	PCI: rcar: Add runtime PM support	2013-12-09 16:24:37 -07:00
pci-tegra.c	ARM: SoC cleanups for 3.14	2014-01-23 18:36:55 -08:00
pcie-designware.c	PCI: designware: Fix indent code style	2014-01-02 14:47:22 -07:00
pcie-designware.h	PCI: designware: Add dw_pcie prefix before cfg_read/write	2013-12-20 09:18:31 -07:00