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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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19a8d6b760
04c81c7293("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks") moved the PCI IRQ fixup to the new host bridge map/swizzle_irq() hooks mechanism. Those hooks can also be called after boot, when all the __init/__initdata/__initconst sections have been freed. Therefore, functions called by them (and the data they refer to) must not be marked as __init/__initdata/__initconst lest compilation trigger section mismatch warnings. Fix all the board files map_irq() hooks by simply removing the respective __init/__initdata/__initconst section markers and by adding another persistent hook IRQ map for the txx9 board files. Fixes:04c81c7293("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks") Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Steve French <smfrench@gmail.com>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <asm/ip32/ip32_ints.h>
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/*
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* O2 has up to 5 PCI devices connected into the MACE bridge. The device
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* map looks like this:
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*
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* 0 aic7xxx 0
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* 1 aic7xxx 1
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* 2 expansion slot
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* 3 N/C
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* 4 N/C
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*/
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#define SCSI0 MACEPCI_SCSI0_IRQ
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#define SCSI1 MACEPCI_SCSI1_IRQ
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#define INTA0 MACEPCI_SLOT0_IRQ
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#define INTA1 MACEPCI_SLOT1_IRQ
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#define INTA2 MACEPCI_SLOT2_IRQ
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#define INTB MACEPCI_SHARED0_IRQ
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#define INTC MACEPCI_SHARED1_IRQ
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#define INTD MACEPCI_SHARED2_IRQ
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static char irq_tab_mace[][5] = {
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/* Dummy INT#A INT#B INT#C INT#D */
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{0, 0, 0, 0, 0}, /* This is placeholder row - never used */
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{0, SCSI0, SCSI0, SCSI0, SCSI0},
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{0, SCSI1, SCSI1, SCSI1, SCSI1},
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{0, INTA0, INTB, INTC, INTD},
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{0, INTA1, INTC, INTD, INTB},
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{0, INTA2, INTD, INTB, INTC},
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};
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/*
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* Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
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* the device (1-4 => A-D), tell what irq to use. Note that we don't
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* in theory have slots 4 and 5, and we never normally use the shared
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* irqs. I suppose a device without a pin A will thank us for doing it
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* right if there exists such a broken piece of crap.
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*/
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int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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return irq_tab_mace[slot][pin];
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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