mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 02:40:55 +07:00
48f753d2ba
Everytime the iSCSI ring finishes setup or shutdown, we need to return the SPQ (slow path queue) credit to the bnx2x driver. Without this step, the SPQ will eventually be full causing iSCSI to fail. This can happen after 3 or 4 MTU changes for example. Add code to wait for these slow path commands to complete in the RX ring and return the SPQ credit to bnx2x. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
372 lines
9.4 KiB
C
372 lines
9.4 KiB
C
/* cnic.h: Broadcom CNIC core network driver.
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*
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* Copyright (c) 2006-2010 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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*/
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#ifndef CNIC_H
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#define CNIC_H
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#define KWQ_PAGE_CNT 4
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#define KCQ_PAGE_CNT 16
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#define KWQ_CID 24
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#define KCQ_CID 25
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/*
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* krnlq_context definition
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*/
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#define L5_KRNLQ_FLAGS 0x00000000
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#define L5_KRNLQ_SIZE 0x00000000
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#define L5_KRNLQ_TYPE 0x00000000
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#define KRNLQ_FLAGS_PG_SZ (0xf<<0)
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#define KRNLQ_FLAGS_PG_SZ_256 (0<<0)
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#define KRNLQ_FLAGS_PG_SZ_512 (1<<0)
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#define KRNLQ_FLAGS_PG_SZ_1K (2<<0)
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#define KRNLQ_FLAGS_PG_SZ_2K (3<<0)
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#define KRNLQ_FLAGS_PG_SZ_4K (4<<0)
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#define KRNLQ_FLAGS_PG_SZ_8K (5<<0)
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#define KRNLQ_FLAGS_PG_SZ_16K (6<<0)
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#define KRNLQ_FLAGS_PG_SZ_32K (7<<0)
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#define KRNLQ_FLAGS_PG_SZ_64K (8<<0)
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#define KRNLQ_FLAGS_PG_SZ_128K (9<<0)
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#define KRNLQ_FLAGS_PG_SZ_256K (10<<0)
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#define KRNLQ_FLAGS_PG_SZ_512K (11<<0)
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#define KRNLQ_FLAGS_PG_SZ_1M (12<<0)
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#define KRNLQ_FLAGS_PG_SZ_2M (13<<0)
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#define KRNLQ_FLAGS_QE_SELF_SEQ (1<<15)
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#define KRNLQ_SIZE_TYPE_SIZE ((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
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#define KRNLQ_TYPE_TYPE (0xf<<28)
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#define KRNLQ_TYPE_TYPE_EMPTY (0<<28)
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#define KRNLQ_TYPE_TYPE_KRNLQ (6<<28)
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#define L5_KRNLQ_HOST_QIDX 0x00000004
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#define L5_KRNLQ_HOST_FW_QIDX 0x00000008
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#define L5_KRNLQ_NX_QE_SELF_SEQ 0x0000000c
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#define L5_KRNLQ_QE_SELF_SEQ_MAX 0x0000000c
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#define L5_KRNLQ_NX_QE_HADDR_HI 0x00000010
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#define L5_KRNLQ_NX_QE_HADDR_LO 0x00000014
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#define L5_KRNLQ_PGTBL_PGIDX 0x00000018
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#define L5_KRNLQ_NX_PG_QIDX 0x00000018
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#define L5_KRNLQ_PGTBL_NPAGES 0x0000001c
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#define L5_KRNLQ_QIDX_INCR 0x0000001c
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#define L5_KRNLQ_PGTBL_HADDR_HI 0x00000020
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#define L5_KRNLQ_PGTBL_HADDR_LO 0x00000024
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#define BNX2_PG_CTX_MAP 0x1a0034
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#define BNX2_ISCSI_CTX_MAP 0x1a0074
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struct cnic_redirect_entry {
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struct dst_entry *old_dst;
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struct dst_entry *new_dst;
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};
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#define MAX_COMPLETED_KCQE 64
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#define MAX_CNIC_L5_CONTEXT 256
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#define MAX_CM_SK_TBL_SZ MAX_CNIC_L5_CONTEXT
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#define MAX_ISCSI_TBL_SZ 256
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#define CNIC_LOCAL_PORT_MIN 60000
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#define CNIC_LOCAL_PORT_MAX 61000
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#define CNIC_LOCAL_PORT_RANGE (CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
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#define KWQE_CNT (BCM_PAGE_SIZE / sizeof(struct kwqe))
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#define KCQE_CNT (BCM_PAGE_SIZE / sizeof(struct kcqe))
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#define MAX_KWQE_CNT (KWQE_CNT - 1)
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#define MAX_KCQE_CNT (KCQE_CNT - 1)
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#define MAX_KWQ_IDX ((KWQ_PAGE_CNT * KWQE_CNT) - 1)
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#define MAX_KCQ_IDX ((KCQ_PAGE_CNT * KCQE_CNT) - 1)
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#define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BCM_PAGE_BITS - 5))
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#define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
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#define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BCM_PAGE_BITS - 5))
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#define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
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#define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \
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(MAX_KCQE_CNT - 1)) ? \
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(x) + 2 : (x) + 1
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#define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
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#define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
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#define BNX2X_KWQ_DATA(cp, x) \
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&(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
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#define DEF_IPID_START 0x8000
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#define DEF_KA_TIMEOUT 10000
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#define DEF_KA_INTERVAL 300000
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#define DEF_KA_MAX_PROBE_COUNT 3
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#define DEF_TOS 0
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#define DEF_TTL 0xfe
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#define DEF_SND_SEQ_SCALE 0
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#define DEF_RCV_BUF 0xffff
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#define DEF_SND_BUF 0xffff
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#define DEF_SEED 0
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#define DEF_MAX_RT_TIME 500
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#define DEF_MAX_DA_COUNT 2
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#define DEF_SWS_TIMER 1000
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#define DEF_MAX_CWND 0xffff
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struct cnic_ctx {
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u32 cid;
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void *ctx;
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dma_addr_t mapping;
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};
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#define BNX2_MAX_CID 0x2000
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struct cnic_dma {
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int num_pages;
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void **pg_arr;
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dma_addr_t *pg_map_arr;
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int pgtbl_size;
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u32 *pgtbl;
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dma_addr_t pgtbl_map;
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};
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struct cnic_id_tbl {
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spinlock_t lock;
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u32 start;
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u32 max;
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u32 next;
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unsigned long *table;
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};
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#define CNIC_KWQ16_DATA_SIZE 128
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struct kwqe_16_data {
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u8 data[CNIC_KWQ16_DATA_SIZE];
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};
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struct cnic_iscsi {
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struct cnic_dma task_array_info;
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struct cnic_dma r2tq_info;
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struct cnic_dma hq_info;
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};
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struct cnic_context {
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u32 cid;
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struct kwqe_16_data *kwqe_data;
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dma_addr_t kwqe_data_mapping;
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wait_queue_head_t waitq;
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int wait_cond;
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unsigned long timestamp;
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u32 ctx_flags;
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#define CTX_FL_OFFLD_START 0x00000001
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u8 ulp_proto_id;
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union {
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struct cnic_iscsi *iscsi;
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} proto;
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};
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struct cnic_local {
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spinlock_t cnic_ulp_lock;
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void *ulp_handle[MAX_CNIC_ULP_TYPE];
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unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
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#define ULP_F_INIT 0
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#define ULP_F_START 1
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#define ULP_F_CALL_PENDING 2
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struct cnic_ulp_ops *ulp_ops[MAX_CNIC_ULP_TYPE];
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unsigned long cnic_local_flags;
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#define CNIC_LCL_FL_KWQ_INIT 0x0
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#define CNIC_LCL_FL_L2_WAIT 0x1
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struct cnic_dev *dev;
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struct cnic_eth_dev *ethdev;
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void *l2_ring;
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dma_addr_t l2_ring_map;
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int l2_ring_size;
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int l2_rx_ring_size;
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void *l2_buf;
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dma_addr_t l2_buf_map;
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int l2_buf_size;
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int l2_single_buf_size;
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u16 *rx_cons_ptr;
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u16 *tx_cons_ptr;
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u16 rx_cons;
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u16 tx_cons;
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u32 kwq_cid_addr;
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u32 kcq_cid_addr;
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struct cnic_dma kwq_info;
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struct kwqe **kwq;
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struct cnic_dma kwq_16_data_info;
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u16 max_kwq_idx;
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u16 kwq_prod_idx;
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u32 kwq_io_addr;
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u16 *kwq_con_idx_ptr;
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u16 kwq_con_idx;
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struct cnic_dma kcq_info;
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struct kcqe **kcq;
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u16 kcq_prod_idx;
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u32 kcq_io_addr;
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union {
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void *gen;
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struct status_block_msix *bnx2;
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struct host_status_block *bnx2x;
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} status_blk;
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struct host_def_status_block *bnx2x_def_status_blk;
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u32 status_blk_num;
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u32 int_num;
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u32 last_status_idx;
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struct tasklet_struct cnic_irq_task;
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struct kcqe *completed_kcq[MAX_COMPLETED_KCQE];
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struct cnic_sock *csk_tbl;
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struct cnic_id_tbl csk_port_tbl;
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struct cnic_dma conn_buf_info;
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struct cnic_dma gbl_buf_info;
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struct cnic_iscsi *iscsi_tbl;
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struct cnic_context *ctx_tbl;
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struct cnic_id_tbl cid_tbl;
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int max_iscsi_conn;
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atomic_t iscsi_conn;
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/* per connection parameters */
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int num_iscsi_tasks;
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int num_ccells;
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int task_array_size;
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int r2tq_size;
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int hq_size;
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int num_cqs;
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struct cnic_ctx *ctx_arr;
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int ctx_blks;
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int ctx_blk_size;
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unsigned long ctx_align;
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int cids_per_blk;
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u32 chip_id;
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int func;
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u32 shmem_base;
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u32 uio_dev;
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struct uio_info *cnic_uinfo;
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struct cnic_ops *cnic_ops;
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int (*start_hw)(struct cnic_dev *);
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void (*stop_hw)(struct cnic_dev *);
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void (*setup_pgtbl)(struct cnic_dev *,
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struct cnic_dma *);
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int (*alloc_resc)(struct cnic_dev *);
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void (*free_resc)(struct cnic_dev *);
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int (*start_cm)(struct cnic_dev *);
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void (*stop_cm)(struct cnic_dev *);
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void (*enable_int)(struct cnic_dev *);
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void (*disable_int_sync)(struct cnic_dev *);
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void (*ack_int)(struct cnic_dev *);
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void (*close_conn)(struct cnic_sock *, u32 opcode);
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u16 (*next_idx)(u16);
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u16 (*hw_idx)(u16);
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};
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struct bnx2x_bd_chain_next {
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u32 addr_lo;
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u32 addr_hi;
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u8 reserved[8];
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};
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#define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1)
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#define ISCSI_RAMROD_CMD_ID_UPDATE_CONN (ISCSI_KCQE_OPCODE_UPDATE_CONN)
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#define ISCSI_RAMROD_CMD_ID_INIT (ISCSI_KCQE_OPCODE_INIT)
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#define CDU_REGION_NUMBER_XCM_AG 2
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#define CDU_REGION_NUMBER_UCM_AG 4
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#define CDU_VALID_DATA(_cid, _region, _type) \
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(((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
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#define CDU_CRC8(_cid, _region, _type) \
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(calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
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#define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \
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(0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
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#define BNX2X_CONTEXT_MEM_SIZE 1024
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#define BNX2X_FCOE_CID 16
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/* iSCSI client IDs are 17, 19, 21, 23 */
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#define BNX2X_ISCSI_BASE_CL_ID 17
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#define BNX2X_ISCSI_CL_ID(vn) (BNX2X_ISCSI_BASE_CL_ID + ((vn) << 1))
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#define BNX2X_ISCSI_L2_CID 17
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#define BNX2X_ISCSI_START_CID 18
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#define BNX2X_ISCSI_NUM_CONNECTIONS 128
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#define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128
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#define BNX2X_ISCSI_MAX_PENDING_R2TS 4
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#define BNX2X_ISCSI_R2TQE_SIZE 8
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#define BNX2X_ISCSI_HQ_BD_SIZE 64
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#define BNX2X_ISCSI_CONN_BUF_SIZE 64
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#define BNX2X_ISCSI_GLB_BUF_SIZE 64
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#define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
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#define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
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#define BNX2X_HW_CID(x, func) ((x) | (((func) % PORT_MAX) << 23) | \
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(((func) >> 1) << 17))
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#define BNX2X_SW_CID(x) (x & 0x1ffff)
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#define BNX2X_CHIP_NUM_57711 0x164f
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#define BNX2X_CHIP_NUM_57711E 0x1650
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#define BNX2X_CHIP_NUM(x) (x >> 16)
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#define BNX2X_CHIP_IS_57711(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
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#define BNX2X_CHIP_IS_57711E(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
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#define BNX2X_CHIP_IS_E1H(x) \
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(BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
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#define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id)
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#define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
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#define BNX2X_MAX_RX_DESC_CNT (BNX2X_RX_DESC_CNT - 2)
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#define BNX2X_RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe))
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#define BNX2X_MAX_RCQ_DESC_CNT (BNX2X_RCQ_DESC_CNT - 1)
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#define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) == \
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(BNX2X_MAX_RCQ_DESC_CNT - 1)) ? \
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((x) + 2) : ((x) + 1)
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#define BNX2X_DEF_SB_ID 16
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#define BNX2X_ISCSI_RX_SB_INDEX_NUM \
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((HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS << \
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USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER_SHIFT) & \
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USTORM_ETH_ST_CONTEXT_CONFIG_CQE_SB_INDEX_NUMBER)
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#define BNX2X_SHMEM_ADDR(base, field) (base + \
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offsetof(struct shmem_region, field))
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#define CNIC_PORT(cp) ((cp)->func % PORT_MAX)
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#define CNIC_FUNC(cp) ((cp)->func)
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#define CNIC_E1HVN(cp) ((cp)->func >> 1)
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#endif
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