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Hypervisor maintenance interrupts (HMIs) are generated by various causes, signalled by bits in the hypervisor maintenance exception register (HMER). In most cases calling OPAL to handle the interrupt is the correct thing to do, but the "debug trigger" HMIs signalled by PPC bit 17 (bit 46) of HMER are used to invoke software workarounds for hardware bugs, and OPAL does not have any code to handle this cause. The debug trigger HMI is used in POWER9 DD2.0 and DD2.1 chips to work around a hardware bug in executing vector load instructions to cache inhibited memory. In POWER9 DD2.2 chips, it is generated when conditions are detected relating to threads being in TM (transactional memory) suspended mode when the core SMT configuration needs to be reconfigured. The kernel currently has code to detect the vector CI load condition, but only when the HMI occurs in the host, not when it occurs in a guest. If a HMI occurs in the guest, it is always passed to OPAL, and then we always re-sync the timebase, because the HMI cause might have been a timebase error, for which OPAL would re-sync the timebase, thus removing the timebase offset which KVM applied for the guest. Since we don't know what OPAL did, we don't know whether to subtract the timebase offset from the timebase, so instead we re-sync the timebase. This adds code to determine explicitly what the cause of a debug trigger HMI will be. This is based on a new device-tree property under the CPU nodes called ibm,hmi-special-triggers, if it is present, or otherwise based on the PVR (processor version register). The handling of debug trigger HMIs is pulled out into a separate function which can be called from the KVM guest exit code. If this function handles and clears the HMI, and no other HMI causes remain, then we skip calling OPAL and we proceed to subtract the guest timebase offset from the timebase. The overall handling for HMIs that occur in the host (i.e. not in a KVM guest) is largely unchanged, except that we now don't set the flag for the vector CI load workaround on DD2.2 processors. This also removes a BUG_ON in the KVM code. BUG_ON is generally not useful in KVM guest entry/exit code since it is difficult to handle the resulting trap gracefully. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
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| .. | ||
| book3s_32_mmu_host.c | ||
| book3s_32_mmu.c | ||
| book3s_32_sr.S | ||
| book3s_64_mmu_host.c | ||
| book3s_64_mmu_hv.c | ||
| book3s_64_mmu_radix.c | ||
| book3s_64_mmu.c | ||
| book3s_64_slb.S | ||
| book3s_64_vio_hv.c | ||
| book3s_64_vio.c | ||
| book3s_emulate.c | ||
| book3s_exports.c | ||
| book3s_hv_builtin.c | ||
| book3s_hv_hmi.c | ||
| book3s_hv_interrupts.S | ||
| book3s_hv_ras.c | ||
| book3s_hv_rm_mmu.c | ||
| book3s_hv_rm_xics.c | ||
| book3s_hv_rm_xive.c | ||
| book3s_hv_rmhandlers.S | ||
| book3s_hv.c | ||
| book3s_interrupts.S | ||
| book3s_mmu_hpte.c | ||
| book3s_paired_singles.c | ||
| book3s_pr_papr.c | ||
| book3s_pr.c | ||
| book3s_rmhandlers.S | ||
| book3s_rtas.c | ||
| book3s_segment.S | ||
| book3s_xics.c | ||
| book3s_xics.h | ||
| book3s_xive_template.c | ||
| book3s_xive.c | ||
| book3s_xive.h | ||
| book3s.c | ||
| book3s.h | ||
| booke_emulate.c | ||
| booke_interrupts.S | ||
| booke.c | ||
| booke.h | ||
| bookehv_interrupts.S | ||
| e500_emulate.c | ||
| e500_mmu_host.c | ||
| e500_mmu_host.h | ||
| e500_mmu.c | ||
| e500.c | ||
| e500.h | ||
| e500mc.c | ||
| emulate_loadstore.c | ||
| emulate.c | ||
| fpu.S | ||
| irq.h | ||
| Kconfig | ||
| Makefile | ||
| mpic.c | ||
| powerpc.c | ||
| timing.c | ||
| timing.h | ||
| trace_book3s.h | ||
| trace_booke.h | ||
| trace_hv.h | ||
| trace_pr.h | ||
| trace.h | ||