mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 11:46:40 +07:00
7be1f6b9a1
Unlocking may take up to 1.4 seconds on some Intel flashes. So lets use a max. of 1.5 seconds (1500ms) as timeout. See "Clear Block Lock-Bits Time" on page 40 in "3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual from February 2003 This patch also fixes some other problems with this timeout: - Don't use HZ in timeout "calculation"! While testing we noticed that an unlocking timeout occured with HZ=1000 and didn't occur with HZ=300. This was because the timeout parameter was calculated differently depending on the HZ value. Now a fixed value of 1500ms is used. - The last parameter of WAIT_TIMEOUT (defined to inval_cache_and_wait_for_operation) has to be passed in micro-seconds. So multiply the ms value with 1000 and not 100 to calculate this value. - Use variable name "mdelay" instead of misleading "udelay". Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Stephan Gatzka <stephan@gatzka.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> |
||
|---|---|---|
| .. | ||
| cfi_cmdset_0001.c | ||
| cfi_cmdset_0002.c | ||
| cfi_cmdset_0020.c | ||
| cfi_probe.c | ||
| cfi_util.c | ||
| chipreg.c | ||
| fwh_lock.h | ||
| gen_probe.c | ||
| jedec_probe.c | ||
| Kconfig | ||
| Makefile | ||
| map_absent.c | ||
| map_ram.c | ||
| map_rom.c | ||