Yash Shah cfda8617e2 riscv: dts: Add DT support for SiFive L2 cache controller ... Add the L2 cache controller DT node in SiFive FU540 soc-specific DT file Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>		2020-01-03 00:56:23 -08:00
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sifive	riscv: dts: Add DT support for SiFive L2 cache controller	2020-01-03 00:56:23 -08:00
Makefile	arch: riscv: add support for building DTB files from DT source data	2019-06-17 02:03:40 -07:00