mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 01:50:54 +07:00
09acc3a1e0
The reason for this is to ensure that STI is probed earlier than with its previous initcall level, module init. This came up as a problem with using CMT as a clock source kzm9g-reference which does not make use of early timers or devices. In that scenario initialisation of SDHI and MMCIF both stall on msleep() calls due to the absence of a initialised clock source. The purpose of this change is to keep the STI code in sync with the CMT code which has been modified in a similar manner.. Boot tested on: kzm9d. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
418 lines
9.7 KiB
C
418 lines
9.7 KiB
C
/*
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* Emma Mobile Timer Support - STI
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*
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* Copyright (C) 2012 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
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struct em_sti_priv {
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void __iomem *base;
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struct clk *clk;
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struct platform_device *pdev;
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unsigned int active[USER_NR];
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unsigned long rate;
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raw_spinlock_t lock;
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struct clock_event_device ced;
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struct clocksource cs;
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};
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#define STI_CONTROL 0x00
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#define STI_COMPA_H 0x10
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#define STI_COMPA_L 0x14
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#define STI_COMPB_H 0x18
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#define STI_COMPB_L 0x1c
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#define STI_COUNT_H 0x20
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#define STI_COUNT_L 0x24
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#define STI_COUNT_RAW_H 0x28
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#define STI_COUNT_RAW_L 0x2c
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#define STI_SET_H 0x30
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#define STI_SET_L 0x34
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#define STI_INTSTATUS 0x40
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#define STI_INTRAWSTATUS 0x44
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#define STI_INTENSET 0x48
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#define STI_INTENCLR 0x4c
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#define STI_INTFFCLR 0x50
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static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
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{
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return ioread32(p->base + offs);
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}
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static inline void em_sti_write(struct em_sti_priv *p, int offs,
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unsigned long value)
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{
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iowrite32(value, p->base + offs);
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}
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static int em_sti_enable(struct em_sti_priv *p)
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{
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int ret;
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/* enable clock */
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ret = clk_enable(p->clk);
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if (ret) {
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dev_err(&p->pdev->dev, "cannot enable clock\n");
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return ret;
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}
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/* configure channel, periodic mode and maximum timeout */
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p->rate = clk_get_rate(p->clk);
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/* reset the counter */
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em_sti_write(p, STI_SET_H, 0x40000000);
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em_sti_write(p, STI_SET_L, 0x00000000);
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/* mask and clear pending interrupts */
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em_sti_write(p, STI_INTENCLR, 3);
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em_sti_write(p, STI_INTFFCLR, 3);
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/* enable updates of counter registers */
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em_sti_write(p, STI_CONTROL, 1);
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return 0;
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}
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static void em_sti_disable(struct em_sti_priv *p)
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{
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/* mask interrupts */
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em_sti_write(p, STI_INTENCLR, 3);
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/* stop clock */
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clk_disable(p->clk);
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}
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static cycle_t em_sti_count(struct em_sti_priv *p)
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{
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cycle_t ticks;
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unsigned long flags;
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/* the STI hardware buffers the 48-bit count, but to
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* break it out into two 32-bit access the registers
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* must be accessed in a certain order.
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* Always read STI_COUNT_H before STI_COUNT_L.
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*/
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raw_spin_lock_irqsave(&p->lock, flags);
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ticks = (cycle_t)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
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ticks |= em_sti_read(p, STI_COUNT_L);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return ticks;
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}
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static cycle_t em_sti_set_next(struct em_sti_priv *p, cycle_t next)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&p->lock, flags);
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/* mask compare A interrupt */
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em_sti_write(p, STI_INTENCLR, 1);
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/* update compare A value */
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em_sti_write(p, STI_COMPA_H, next >> 32);
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em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
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/* clear compare A interrupt source */
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em_sti_write(p, STI_INTFFCLR, 1);
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/* unmask compare A interrupt */
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em_sti_write(p, STI_INTENSET, 1);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return next;
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}
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static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
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{
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struct em_sti_priv *p = dev_id;
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p->ced.event_handler(&p->ced);
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return IRQ_HANDLED;
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}
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static int em_sti_start(struct em_sti_priv *p, unsigned int user)
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{
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unsigned long flags;
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int used_before;
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int ret = 0;
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raw_spin_lock_irqsave(&p->lock, flags);
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used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
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if (!used_before)
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ret = em_sti_enable(p);
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if (!ret)
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p->active[user] = 1;
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return ret;
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}
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static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
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{
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unsigned long flags;
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int used_before, used_after;
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raw_spin_lock_irqsave(&p->lock, flags);
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used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
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p->active[user] = 0;
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used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
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if (used_before && !used_after)
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em_sti_disable(p);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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}
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static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
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{
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return container_of(cs, struct em_sti_priv, cs);
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}
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static cycle_t em_sti_clocksource_read(struct clocksource *cs)
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{
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return em_sti_count(cs_to_em_sti(cs));
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}
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static int em_sti_clocksource_enable(struct clocksource *cs)
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{
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int ret;
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struct em_sti_priv *p = cs_to_em_sti(cs);
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ret = em_sti_start(p, USER_CLOCKSOURCE);
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if (!ret)
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__clocksource_updatefreq_hz(cs, p->rate);
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return ret;
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}
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static void em_sti_clocksource_disable(struct clocksource *cs)
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{
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em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
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}
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static void em_sti_clocksource_resume(struct clocksource *cs)
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{
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em_sti_clocksource_enable(cs);
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}
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static int em_sti_register_clocksource(struct em_sti_priv *p)
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{
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struct clocksource *cs = &p->cs;
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memset(cs, 0, sizeof(*cs));
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cs->name = dev_name(&p->pdev->dev);
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cs->rating = 200;
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cs->read = em_sti_clocksource_read;
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cs->enable = em_sti_clocksource_enable;
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cs->disable = em_sti_clocksource_disable;
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cs->suspend = em_sti_clocksource_disable;
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cs->resume = em_sti_clocksource_resume;
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cs->mask = CLOCKSOURCE_MASK(48);
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cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
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dev_info(&p->pdev->dev, "used as clock source\n");
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/* Register with dummy 1 Hz value, gets updated in ->enable() */
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clocksource_register_hz(cs, 1);
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return 0;
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}
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static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
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{
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return container_of(ced, struct em_sti_priv, ced);
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}
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static void em_sti_clock_event_mode(enum clock_event_mode mode,
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struct clock_event_device *ced)
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{
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struct em_sti_priv *p = ced_to_em_sti(ced);
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/* deal with old setting first */
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switch (ced->mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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em_sti_stop(p, USER_CLOCKEVENT);
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break;
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default:
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break;
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}
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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dev_info(&p->pdev->dev, "used for oneshot clock events\n");
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em_sti_start(p, USER_CLOCKEVENT);
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clockevents_config(&p->ced, p->rate);
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_UNUSED:
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em_sti_stop(p, USER_CLOCKEVENT);
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break;
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default:
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break;
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}
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}
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static int em_sti_clock_event_next(unsigned long delta,
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struct clock_event_device *ced)
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{
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struct em_sti_priv *p = ced_to_em_sti(ced);
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cycle_t next;
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int safe;
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next = em_sti_set_next(p, em_sti_count(p) + delta);
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safe = em_sti_count(p) < (next - 1);
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return !safe;
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}
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static void em_sti_register_clockevent(struct em_sti_priv *p)
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{
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struct clock_event_device *ced = &p->ced;
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memset(ced, 0, sizeof(*ced));
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ced->name = dev_name(&p->pdev->dev);
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ced->features = CLOCK_EVT_FEAT_ONESHOT;
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ced->rating = 200;
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ced->cpumask = cpumask_of(0);
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ced->set_next_event = em_sti_clock_event_next;
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ced->set_mode = em_sti_clock_event_mode;
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dev_info(&p->pdev->dev, "used for clock events\n");
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/* Register with dummy 1 Hz value, gets updated in ->set_mode() */
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clockevents_config_and_register(ced, 1, 2, 0xffffffff);
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}
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static int em_sti_probe(struct platform_device *pdev)
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{
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struct em_sti_priv *p;
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struct resource *res;
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int irq, ret;
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p = kzalloc(sizeof(*p), GFP_KERNEL);
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if (p == NULL) {
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dev_err(&pdev->dev, "failed to allocate driver data\n");
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ret = -ENOMEM;
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goto err0;
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}
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p->pdev = pdev;
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platform_set_drvdata(pdev, p);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "failed to get I/O memory\n");
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ret = -EINVAL;
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goto err0;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "failed to get irq\n");
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ret = -EINVAL;
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goto err0;
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}
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/* map memory, let base point to the STI instance */
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p->base = ioremap_nocache(res->start, resource_size(res));
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if (p->base == NULL) {
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dev_err(&pdev->dev, "failed to remap I/O memory\n");
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ret = -ENXIO;
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goto err0;
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}
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/* get hold of clock */
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p->clk = clk_get(&pdev->dev, "sclk");
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if (IS_ERR(p->clk)) {
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dev_err(&pdev->dev, "cannot get clock\n");
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ret = PTR_ERR(p->clk);
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goto err1;
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}
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if (request_irq(irq, em_sti_interrupt,
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IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
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dev_name(&pdev->dev), p)) {
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dev_err(&pdev->dev, "failed to request low IRQ\n");
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ret = -ENOENT;
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goto err2;
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}
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raw_spin_lock_init(&p->lock);
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em_sti_register_clockevent(p);
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em_sti_register_clocksource(p);
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return 0;
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err2:
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clk_put(p->clk);
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err1:
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iounmap(p->base);
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err0:
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kfree(p);
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return ret;
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}
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static int em_sti_remove(struct platform_device *pdev)
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{
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return -EBUSY; /* cannot unregister clockevent and clocksource */
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}
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static const struct of_device_id em_sti_dt_ids[] = {
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{ .compatible = "renesas,em-sti", },
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{},
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};
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MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
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static struct platform_driver em_sti_device_driver = {
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.probe = em_sti_probe,
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.remove = em_sti_remove,
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.driver = {
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.name = "em_sti",
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.of_match_table = em_sti_dt_ids,
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}
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};
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static int __init em_sti_init(void)
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{
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return platform_driver_register(&em_sti_device_driver);
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}
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static void __exit em_sti_exit(void)
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{
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platform_driver_unregister(&em_sti_device_driver);
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}
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subsys_initcall(em_sti_init);
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module_exit(em_sti_exit);
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MODULE_AUTHOR("Magnus Damm");
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MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
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MODULE_LICENSE("GPL v2");
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