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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8acbbfec28
The existing definitions are ambiguous and possibly misleading. For DP0, 'flow-control' is only relevant for the BRA protocol and should not be confused with async modes explicitly not supported for DP0, add prefix to follow MIPI DisCo definition The use of 'device_interrupts' is also questionable. The MIPI SoundWire spec defines Slave-, DP0- and DPN-level implementation-defined interrupts. Using the 'device' prefix in the last two cases is misleading, not only is the term 'device' overloaded but these properties are only valid at the DP0 and DPn levels. Rename to follow the MIPI definitions, no need to be creative here. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
1039 lines
24 KiB
C
1039 lines
24 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-17 Intel Corporation.
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#include <linux/acpi.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pm_runtime.h>
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#include <linux/soundwire/sdw_registers.h>
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#include <linux/soundwire/sdw.h>
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#include "bus.h"
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/**
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* sdw_add_bus_master() - add a bus Master instance
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* @bus: bus instance
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*
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* Initializes the bus instance, read properties and create child
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* devices.
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*/
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int sdw_add_bus_master(struct sdw_bus *bus)
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{
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struct sdw_master_prop *prop = NULL;
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int ret;
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if (!bus->dev) {
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pr_err("SoundWire bus has no device\n");
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return -ENODEV;
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}
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if (!bus->ops) {
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dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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return -EINVAL;
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}
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mutex_init(&bus->msg_lock);
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mutex_init(&bus->bus_lock);
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INIT_LIST_HEAD(&bus->slaves);
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INIT_LIST_HEAD(&bus->m_rt_list);
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/*
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* Initialize multi_link flag
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* TODO: populate this flag by reading property from FW node
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*/
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bus->multi_link = false;
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if (bus->ops->read_prop) {
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ret = bus->ops->read_prop(bus);
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if (ret < 0) {
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dev_err(bus->dev,
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"Bus read properties failed:%d\n", ret);
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return ret;
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}
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}
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/*
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* Device numbers in SoundWire are 0 through 15. Enumeration device
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* number (0), Broadcast device number (15), Group numbers (12 and
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* 13) and Master device number (14) are not used for assignment so
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* mask these and other higher bits.
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*/
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/* Set higher order bits */
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*bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
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/* Set enumuration device number and broadcast device number */
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set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
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set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
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/* Set group device numbers and master device number */
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set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
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set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
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set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
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/*
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* SDW is an enumerable bus, but devices can be powered off. So,
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* they won't be able to report as present.
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*
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* Create Slave devices based on Slaves described in
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* the respective firmware (ACPI/DT)
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*/
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if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
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ret = sdw_acpi_find_slaves(bus);
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else
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ret = -ENOTSUPP; /* No ACPI/DT so error out */
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if (ret) {
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dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
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return ret;
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}
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/*
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* Initialize clock values based on Master properties. The max
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* frequency is read from max_clk_freq property. Current assumption
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* is that the bus will start at highest clock frequency when
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* powered on.
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*
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* Default active bank will be 0 as out of reset the Slaves have
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* to start with bank 0 (Table 40 of Spec)
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*/
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prop = &bus->prop;
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bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
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bus->params.curr_dr_freq = bus->params.max_dr_freq;
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bus->params.curr_bank = SDW_BANK0;
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bus->params.next_bank = SDW_BANK1;
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return 0;
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}
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EXPORT_SYMBOL(sdw_add_bus_master);
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static int sdw_delete_slave(struct device *dev, void *data)
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{
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struct sdw_slave *slave = dev_to_sdw_dev(dev);
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struct sdw_bus *bus = slave->bus;
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mutex_lock(&bus->bus_lock);
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if (slave->dev_num) /* clear dev_num if assigned */
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clear_bit(slave->dev_num, bus->assigned);
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list_del_init(&slave->node);
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mutex_unlock(&bus->bus_lock);
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device_unregister(dev);
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return 0;
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}
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/**
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* sdw_delete_bus_master() - delete the bus master instance
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* @bus: bus to be deleted
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*
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* Remove the instance, delete the child devices.
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*/
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void sdw_delete_bus_master(struct sdw_bus *bus)
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{
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device_for_each_child(bus->dev, NULL, sdw_delete_slave);
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}
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EXPORT_SYMBOL(sdw_delete_bus_master);
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/*
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* SDW IO Calls
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*/
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static inline int find_response_code(enum sdw_command_response resp)
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{
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switch (resp) {
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case SDW_CMD_OK:
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return 0;
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case SDW_CMD_IGNORED:
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return -ENODATA;
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case SDW_CMD_TIMEOUT:
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return -ETIMEDOUT;
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default:
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return -EIO;
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}
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}
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static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
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{
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int retry = bus->prop.err_threshold;
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enum sdw_command_response resp;
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int ret = 0, i;
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for (i = 0; i <= retry; i++) {
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resp = bus->ops->xfer_msg(bus, msg);
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ret = find_response_code(resp);
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/* if cmd is ok or ignored return */
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if (ret == 0 || ret == -ENODATA)
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return ret;
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}
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return ret;
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}
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static inline int do_transfer_defer(struct sdw_bus *bus,
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struct sdw_msg *msg,
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struct sdw_defer *defer)
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{
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int retry = bus->prop.err_threshold;
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enum sdw_command_response resp;
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int ret = 0, i;
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defer->msg = msg;
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defer->length = msg->len;
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init_completion(&defer->complete);
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for (i = 0; i <= retry; i++) {
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resp = bus->ops->xfer_msg_defer(bus, msg, defer);
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ret = find_response_code(resp);
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/* if cmd is ok or ignored return */
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if (ret == 0 || ret == -ENODATA)
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return ret;
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}
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return ret;
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}
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static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
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{
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int retry = bus->prop.err_threshold;
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enum sdw_command_response resp;
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int ret = 0, i;
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for (i = 0; i <= retry; i++) {
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resp = bus->ops->reset_page_addr(bus, dev_num);
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ret = find_response_code(resp);
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/* if cmd is ok or ignored return */
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if (ret == 0 || ret == -ENODATA)
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return ret;
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}
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return ret;
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}
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/**
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* sdw_transfer() - Synchronous transfer message to a SDW Slave device
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* @bus: SDW bus
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* @msg: SDW message to be xfered
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*/
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int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
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{
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int ret;
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mutex_lock(&bus->msg_lock);
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ret = do_transfer(bus, msg);
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if (ret != 0 && ret != -ENODATA)
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dev_err(bus->dev, "trf on Slave %d failed:%d\n",
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msg->dev_num, ret);
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if (msg->page)
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sdw_reset_page(bus, msg->dev_num);
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mutex_unlock(&bus->msg_lock);
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return ret;
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}
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/**
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* sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
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* @bus: SDW bus
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* @msg: SDW message to be xfered
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* @defer: Defer block for signal completion
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*
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* Caller needs to hold the msg_lock lock while calling this
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*/
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int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
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struct sdw_defer *defer)
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{
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int ret;
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if (!bus->ops->xfer_msg_defer)
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return -ENOTSUPP;
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ret = do_transfer_defer(bus, msg, defer);
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if (ret != 0 && ret != -ENODATA)
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dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
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msg->dev_num, ret);
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if (msg->page)
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sdw_reset_page(bus, msg->dev_num);
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return ret;
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}
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int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
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u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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{
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memset(msg, 0, sizeof(*msg));
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msg->addr = addr; /* addr is 16 bit and truncated here */
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msg->len = count;
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msg->dev_num = dev_num;
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msg->flags = flags;
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msg->buf = buf;
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if (addr < SDW_REG_NO_PAGE) { /* no paging area */
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return 0;
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} else if (addr >= SDW_REG_MAX) { /* illegal addr */
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pr_err("SDW: Invalid address %x passed\n", addr);
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return -EINVAL;
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}
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if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
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if (slave && !slave->prop.paging_support)
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return 0;
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/* no need for else as that will fall-through to paging */
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}
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/* paging mandatory */
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if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
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pr_err("SDW: Invalid device for paging :%d\n", dev_num);
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return -EINVAL;
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}
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if (!slave) {
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pr_err("SDW: No slave for paging addr\n");
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return -EINVAL;
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} else if (!slave->prop.paging_support) {
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dev_err(&slave->dev,
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"address %x needs paging but no support\n", addr);
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return -EINVAL;
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}
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msg->addr_page1 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE1_MASK));
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msg->addr_page2 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE2_MASK));
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msg->addr |= BIT(15);
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msg->page = true;
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return 0;
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}
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/**
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* sdw_nread() - Read "n" contiguous SDW Slave registers
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* @slave: SDW Slave
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* @addr: Register address
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* @count: length
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* @val: Buffer for values to be read
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*/
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int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
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{
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struct sdw_msg msg;
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int ret;
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ret = sdw_fill_msg(&msg, slave, addr, count,
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slave->dev_num, SDW_MSG_FLAG_READ, val);
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if (ret < 0)
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return ret;
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ret = pm_runtime_get_sync(slave->bus->dev);
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if (ret < 0)
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return ret;
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ret = sdw_transfer(slave->bus, &msg);
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pm_runtime_put(slave->bus->dev);
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return ret;
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}
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EXPORT_SYMBOL(sdw_nread);
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/**
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* sdw_nwrite() - Write "n" contiguous SDW Slave registers
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* @slave: SDW Slave
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* @addr: Register address
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* @count: length
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* @val: Buffer for values to be read
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*/
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int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
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{
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struct sdw_msg msg;
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int ret;
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ret = sdw_fill_msg(&msg, slave, addr, count,
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slave->dev_num, SDW_MSG_FLAG_WRITE, val);
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if (ret < 0)
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return ret;
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ret = pm_runtime_get_sync(slave->bus->dev);
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if (ret < 0)
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return ret;
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ret = sdw_transfer(slave->bus, &msg);
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pm_runtime_put(slave->bus->dev);
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return ret;
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}
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EXPORT_SYMBOL(sdw_nwrite);
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/**
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* sdw_read() - Read a SDW Slave register
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* @slave: SDW Slave
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* @addr: Register address
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*/
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int sdw_read(struct sdw_slave *slave, u32 addr)
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{
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u8 buf;
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int ret;
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ret = sdw_nread(slave, addr, 1, &buf);
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if (ret < 0)
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return ret;
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else
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return buf;
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}
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EXPORT_SYMBOL(sdw_read);
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/**
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* sdw_write() - Write a SDW Slave register
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* @slave: SDW Slave
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* @addr: Register address
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* @value: Register value
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*/
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int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
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{
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return sdw_nwrite(slave, addr, 1, &value);
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}
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EXPORT_SYMBOL(sdw_write);
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/*
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* SDW alert handling
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*/
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/* called with bus_lock held */
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static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
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{
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struct sdw_slave *slave = NULL;
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list_for_each_entry(slave, &bus->slaves, node) {
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if (slave->dev_num == i)
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return slave;
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}
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return NULL;
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}
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static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
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{
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if (slave->id.unique_id != id.unique_id ||
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slave->id.mfg_id != id.mfg_id ||
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slave->id.part_id != id.part_id ||
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slave->id.class_id != id.class_id)
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return -ENODEV;
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return 0;
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}
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/* called with bus_lock held */
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static int sdw_get_device_num(struct sdw_slave *slave)
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{
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int bit;
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bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
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if (bit == SDW_MAX_DEVICES) {
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bit = -ENODEV;
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goto err;
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}
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/*
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* Do not update dev_num in Slave data structure here,
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* Update once program dev_num is successful
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*/
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set_bit(bit, slave->bus->assigned);
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err:
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return bit;
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}
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static int sdw_assign_device_num(struct sdw_slave *slave)
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{
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int ret, dev_num;
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/* check first if device number is assigned, if so reuse that */
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if (!slave->dev_num) {
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mutex_lock(&slave->bus->bus_lock);
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dev_num = sdw_get_device_num(slave);
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mutex_unlock(&slave->bus->bus_lock);
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if (dev_num < 0) {
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dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
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dev_num);
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return dev_num;
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}
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} else {
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dev_info(slave->bus->dev,
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"Slave already registered dev_num:%d\n",
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slave->dev_num);
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/* Clear the slave->dev_num to transfer message on device 0 */
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dev_num = slave->dev_num;
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slave->dev_num = 0;
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}
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ret = sdw_write(slave, SDW_SCP_DEVNUMBER, dev_num);
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if (ret < 0) {
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dev_err(&slave->dev, "Program device_num failed: %d\n", ret);
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return ret;
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}
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/* After xfer of msg, restore dev_num */
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slave->dev_num = dev_num;
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return 0;
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}
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void sdw_extract_slave_id(struct sdw_bus *bus,
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u64 addr, struct sdw_slave_id *id)
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{
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dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
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/*
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* Spec definition
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* Register Bit Contents
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* DevId_0 [7:4] 47:44 sdw_version
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* DevId_0 [3:0] 43:40 unique_id
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* DevId_1 39:32 mfg_id [15:8]
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* DevId_2 31:24 mfg_id [7:0]
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* DevId_3 23:16 part_id [15:8]
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* DevId_4 15:08 part_id [7:0]
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* DevId_5 07:00 class_id
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*/
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id->sdw_version = (addr >> 44) & GENMASK(3, 0);
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id->unique_id = (addr >> 40) & GENMASK(3, 0);
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id->mfg_id = (addr >> 24) & GENMASK(15, 0);
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id->part_id = (addr >> 8) & GENMASK(15, 0);
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id->class_id = addr & GENMASK(7, 0);
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dev_dbg(bus->dev,
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"SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n",
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id->class_id, id->part_id, id->mfg_id,
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id->unique_id, id->sdw_version);
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}
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static int sdw_program_device_num(struct sdw_bus *bus)
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{
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u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
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struct sdw_slave *slave, *_s;
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struct sdw_slave_id id;
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struct sdw_msg msg;
|
|
bool found = false;
|
|
int count = 0, ret;
|
|
u64 addr;
|
|
|
|
/* No Slave, so use raw xfer api */
|
|
ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
|
|
SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
do {
|
|
ret = sdw_transfer(bus, &msg);
|
|
if (ret == -ENODATA) { /* end of device id reads */
|
|
ret = 0;
|
|
break;
|
|
}
|
|
if (ret < 0) {
|
|
dev_err(bus->dev, "DEVID read fail:%d\n", ret);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Construct the addr and extract. Cast the higher shift
|
|
* bits to avoid truncation due to size limit.
|
|
*/
|
|
addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
|
|
((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
|
|
((u64)buf[0] << 40);
|
|
|
|
sdw_extract_slave_id(bus, addr, &id);
|
|
|
|
/* Now compare with entries */
|
|
list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
|
|
if (sdw_compare_devid(slave, id) == 0) {
|
|
found = true;
|
|
|
|
/*
|
|
* Assign a new dev_num to this Slave and
|
|
* not mark it present. It will be marked
|
|
* present after it reports ATTACHED on new
|
|
* dev_num
|
|
*/
|
|
ret = sdw_assign_device_num(slave);
|
|
if (ret) {
|
|
dev_err(slave->bus->dev,
|
|
"Assign dev_num failed:%d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!found) {
|
|
/* TODO: Park this device in Group 13 */
|
|
dev_err(bus->dev, "Slave Entry not found\n");
|
|
}
|
|
|
|
count++;
|
|
|
|
/*
|
|
* Check till error out or retry (count) exhausts.
|
|
* Device can drop off and rejoin during enumeration
|
|
* so count till twice the bound.
|
|
*/
|
|
|
|
} while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void sdw_modify_slave_status(struct sdw_slave *slave,
|
|
enum sdw_slave_status status)
|
|
{
|
|
mutex_lock(&slave->bus->bus_lock);
|
|
slave->status = status;
|
|
mutex_unlock(&slave->bus->bus_lock);
|
|
}
|
|
|
|
int sdw_configure_dpn_intr(struct sdw_slave *slave,
|
|
int port, bool enable, int mask)
|
|
{
|
|
u32 addr;
|
|
int ret;
|
|
u8 val = 0;
|
|
|
|
addr = SDW_DPN_INTMASK(port);
|
|
|
|
/* Set/Clear port ready interrupt mask */
|
|
if (enable) {
|
|
val |= mask;
|
|
val |= SDW_DPN_INT_PORT_READY;
|
|
} else {
|
|
val &= ~(mask);
|
|
val &= ~SDW_DPN_INT_PORT_READY;
|
|
}
|
|
|
|
ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
|
|
if (ret < 0)
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DPN_INTMASK write failed:%d\n", val);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sdw_initialize_slave(struct sdw_slave *slave)
|
|
{
|
|
struct sdw_slave_prop *prop = &slave->prop;
|
|
int ret;
|
|
u8 val;
|
|
|
|
/*
|
|
* Set bus clash, parity and SCP implementation
|
|
* defined interrupt mask
|
|
* TODO: Read implementation defined interrupt mask
|
|
* from Slave property
|
|
*/
|
|
val = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
|
|
SDW_SCP_INT1_PARITY;
|
|
|
|
/* Enable SCP interrupts */
|
|
ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INTMASK1 write failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/* No need to continue if DP0 is not present */
|
|
if (!slave->prop.dp0_prop)
|
|
return 0;
|
|
|
|
/* Enable DP0 interrupts */
|
|
val = prop->dp0_prop->imp_def_interrupts;
|
|
val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
|
|
|
|
ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DP0_INTMASK read failed:%d\n", ret);
|
|
return val;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
|
|
{
|
|
u8 clear = 0, impl_int_mask;
|
|
int status, status2, ret, count = 0;
|
|
|
|
status = sdw_read(slave, SDW_DP0_INT);
|
|
if (status < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DP0_INT read failed:%d\n", status);
|
|
return status;
|
|
}
|
|
|
|
do {
|
|
if (status & SDW_DP0_INT_TEST_FAIL) {
|
|
dev_err(&slave->dev, "Test fail for port 0\n");
|
|
clear |= SDW_DP0_INT_TEST_FAIL;
|
|
}
|
|
|
|
/*
|
|
* Assumption: PORT_READY interrupt will be received only for
|
|
* ports implementing Channel Prepare state machine (CP_SM)
|
|
*/
|
|
|
|
if (status & SDW_DP0_INT_PORT_READY) {
|
|
complete(&slave->port_ready[0]);
|
|
clear |= SDW_DP0_INT_PORT_READY;
|
|
}
|
|
|
|
if (status & SDW_DP0_INT_BRA_FAILURE) {
|
|
dev_err(&slave->dev, "BRA failed\n");
|
|
clear |= SDW_DP0_INT_BRA_FAILURE;
|
|
}
|
|
|
|
impl_int_mask = SDW_DP0_INT_IMPDEF1 |
|
|
SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
|
|
|
|
if (status & impl_int_mask) {
|
|
clear |= impl_int_mask;
|
|
*slave_status = clear;
|
|
}
|
|
|
|
/* clear the interrupt */
|
|
ret = sdw_write(slave, SDW_DP0_INT, clear);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DP0_INT write failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/* Read DP0 interrupt again */
|
|
status2 = sdw_read(slave, SDW_DP0_INT);
|
|
if (status2 < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DP0_INT read failed:%d\n", status2);
|
|
return status2;
|
|
}
|
|
status &= status2;
|
|
|
|
count++;
|
|
|
|
/* we can get alerts while processing so keep retrying */
|
|
} while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
|
|
|
|
if (count == SDW_READ_INTR_CLEAR_RETRY)
|
|
dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sdw_handle_port_interrupt(struct sdw_slave *slave,
|
|
int port, u8 *slave_status)
|
|
{
|
|
u8 clear = 0, impl_int_mask;
|
|
int status, status2, ret, count = 0;
|
|
u32 addr;
|
|
|
|
if (port == 0)
|
|
return sdw_handle_dp0_interrupt(slave, slave_status);
|
|
|
|
addr = SDW_DPN_INT(port);
|
|
status = sdw_read(slave, addr);
|
|
if (status < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DPN_INT read failed:%d\n", status);
|
|
|
|
return status;
|
|
}
|
|
|
|
do {
|
|
if (status & SDW_DPN_INT_TEST_FAIL) {
|
|
dev_err(&slave->dev, "Test fail for port:%d\n", port);
|
|
clear |= SDW_DPN_INT_TEST_FAIL;
|
|
}
|
|
|
|
/*
|
|
* Assumption: PORT_READY interrupt will be received only
|
|
* for ports implementing CP_SM.
|
|
*/
|
|
if (status & SDW_DPN_INT_PORT_READY) {
|
|
complete(&slave->port_ready[port]);
|
|
clear |= SDW_DPN_INT_PORT_READY;
|
|
}
|
|
|
|
impl_int_mask = SDW_DPN_INT_IMPDEF1 |
|
|
SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
|
|
|
|
if (status & impl_int_mask) {
|
|
clear |= impl_int_mask;
|
|
*slave_status = clear;
|
|
}
|
|
|
|
/* clear the interrupt */
|
|
ret = sdw_write(slave, addr, clear);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DPN_INT write failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/* Read DPN interrupt again */
|
|
status2 = sdw_read(slave, addr);
|
|
if (status2 < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_DPN_INT read failed:%d\n", status2);
|
|
return status2;
|
|
}
|
|
status &= status2;
|
|
|
|
count++;
|
|
|
|
/* we can get alerts while processing so keep retrying */
|
|
} while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
|
|
|
|
if (count == SDW_READ_INTR_CLEAR_RETRY)
|
|
dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sdw_handle_slave_alerts(struct sdw_slave *slave)
|
|
{
|
|
struct sdw_slave_intr_status slave_intr;
|
|
u8 clear = 0, bit, port_status[15];
|
|
int port_num, stat, ret, count = 0;
|
|
unsigned long port;
|
|
bool slave_notify = false;
|
|
u8 buf, buf2[2], _buf, _buf2[2];
|
|
|
|
sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
|
|
|
|
/* Read Instat 1, Instat 2 and Instat 3 registers */
|
|
ret = sdw_read(slave, SDW_SCP_INT1);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INT1 read failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
buf = ret;
|
|
|
|
ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INT2/3 read failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
do {
|
|
/*
|
|
* Check parity, bus clash and Slave (impl defined)
|
|
* interrupt
|
|
*/
|
|
if (buf & SDW_SCP_INT1_PARITY) {
|
|
dev_err(&slave->dev, "Parity error detected\n");
|
|
clear |= SDW_SCP_INT1_PARITY;
|
|
}
|
|
|
|
if (buf & SDW_SCP_INT1_BUS_CLASH) {
|
|
dev_err(&slave->dev, "Bus clash error detected\n");
|
|
clear |= SDW_SCP_INT1_BUS_CLASH;
|
|
}
|
|
|
|
/*
|
|
* When bus clash or parity errors are detected, such errors
|
|
* are unlikely to be recoverable errors.
|
|
* TODO: In such scenario, reset bus. Make this configurable
|
|
* via sysfs property with bus reset being the default.
|
|
*/
|
|
|
|
if (buf & SDW_SCP_INT1_IMPL_DEF) {
|
|
dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
|
|
clear |= SDW_SCP_INT1_IMPL_DEF;
|
|
slave_notify = true;
|
|
}
|
|
|
|
/* Check port 0 - 3 interrupts */
|
|
port = buf & SDW_SCP_INT1_PORT0_3;
|
|
|
|
/* To get port number corresponding to bits, shift it */
|
|
port = port >> SDW_REG_SHIFT(SDW_SCP_INT1_PORT0_3);
|
|
for_each_set_bit(bit, &port, 8) {
|
|
sdw_handle_port_interrupt(slave, bit,
|
|
&port_status[bit]);
|
|
}
|
|
|
|
/* Check if cascade 2 interrupt is present */
|
|
if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
|
|
port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
|
|
for_each_set_bit(bit, &port, 8) {
|
|
/* scp2 ports start from 4 */
|
|
port_num = bit + 3;
|
|
sdw_handle_port_interrupt(slave,
|
|
port_num,
|
|
&port_status[port_num]);
|
|
}
|
|
}
|
|
|
|
/* now check last cascade */
|
|
if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
|
|
port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
|
|
for_each_set_bit(bit, &port, 8) {
|
|
/* scp3 ports start from 11 */
|
|
port_num = bit + 10;
|
|
sdw_handle_port_interrupt(slave,
|
|
port_num,
|
|
&port_status[port_num]);
|
|
}
|
|
}
|
|
|
|
/* Update the Slave driver */
|
|
if (slave_notify && slave->ops &&
|
|
slave->ops->interrupt_callback) {
|
|
slave_intr.control_port = clear;
|
|
memcpy(slave_intr.port, &port_status,
|
|
sizeof(slave_intr.port));
|
|
|
|
slave->ops->interrupt_callback(slave, &slave_intr);
|
|
}
|
|
|
|
/* Ack interrupt */
|
|
ret = sdw_write(slave, SDW_SCP_INT1, clear);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INT1 write failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Read status again to ensure no new interrupts arrived
|
|
* while servicing interrupts.
|
|
*/
|
|
ret = sdw_read(slave, SDW_SCP_INT1);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INT1 read failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
_buf = ret;
|
|
|
|
ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
|
|
if (ret < 0) {
|
|
dev_err(slave->bus->dev,
|
|
"SDW_SCP_INT2/3 read failed:%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/* Make sure no interrupts are pending */
|
|
buf &= _buf;
|
|
buf2[0] &= _buf2[0];
|
|
buf2[1] &= _buf2[1];
|
|
stat = buf || buf2[0] || buf2[1];
|
|
|
|
/*
|
|
* Exit loop if Slave is continuously in ALERT state even
|
|
* after servicing the interrupt multiple times.
|
|
*/
|
|
count++;
|
|
|
|
/* we can get alerts while processing so keep retrying */
|
|
} while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
|
|
|
|
if (count == SDW_READ_INTR_CLEAR_RETRY)
|
|
dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sdw_update_slave_status(struct sdw_slave *slave,
|
|
enum sdw_slave_status status)
|
|
{
|
|
if (slave->ops && slave->ops->update_status)
|
|
return slave->ops->update_status(slave, status);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* sdw_handle_slave_status() - Handle Slave status
|
|
* @bus: SDW bus instance
|
|
* @status: Status for all Slave(s)
|
|
*/
|
|
int sdw_handle_slave_status(struct sdw_bus *bus,
|
|
enum sdw_slave_status status[])
|
|
{
|
|
enum sdw_slave_status prev_status;
|
|
struct sdw_slave *slave;
|
|
int i, ret = 0;
|
|
|
|
if (status[0] == SDW_SLAVE_ATTACHED) {
|
|
ret = sdw_program_device_num(bus);
|
|
if (ret)
|
|
dev_err(bus->dev, "Slave attach failed: %d\n", ret);
|
|
}
|
|
|
|
/* Continue to check other slave statuses */
|
|
for (i = 1; i <= SDW_MAX_DEVICES; i++) {
|
|
mutex_lock(&bus->bus_lock);
|
|
if (test_bit(i, bus->assigned) == false) {
|
|
mutex_unlock(&bus->bus_lock);
|
|
continue;
|
|
}
|
|
mutex_unlock(&bus->bus_lock);
|
|
|
|
slave = sdw_get_slave(bus, i);
|
|
if (!slave)
|
|
continue;
|
|
|
|
switch (status[i]) {
|
|
case SDW_SLAVE_UNATTACHED:
|
|
if (slave->status == SDW_SLAVE_UNATTACHED)
|
|
break;
|
|
|
|
sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
|
|
break;
|
|
|
|
case SDW_SLAVE_ALERT:
|
|
ret = sdw_handle_slave_alerts(slave);
|
|
if (ret)
|
|
dev_err(bus->dev,
|
|
"Slave %d alert handling failed: %d\n",
|
|
i, ret);
|
|
break;
|
|
|
|
case SDW_SLAVE_ATTACHED:
|
|
if (slave->status == SDW_SLAVE_ATTACHED)
|
|
break;
|
|
|
|
prev_status = slave->status;
|
|
sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
|
|
|
|
if (prev_status == SDW_SLAVE_ALERT)
|
|
break;
|
|
|
|
ret = sdw_initialize_slave(slave);
|
|
if (ret)
|
|
dev_err(bus->dev,
|
|
"Slave %d initialization failed: %d\n",
|
|
i, ret);
|
|
|
|
break;
|
|
|
|
default:
|
|
dev_err(bus->dev, "Invalid slave %d status:%d\n",
|
|
i, status[i]);
|
|
break;
|
|
}
|
|
|
|
ret = sdw_update_slave_status(slave, status[i]);
|
|
if (ret)
|
|
dev_err(slave->bus->dev,
|
|
"Update Slave status failed:%d\n", ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(sdw_handle_slave_status);
|