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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5b696a67c3
This patch adds common framebuffer device helpers and register defines for S5PV210 based machines. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
63 lines
1.8 KiB
C
63 lines
1.8 KiB
C
/* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c
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*
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* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Base s5pv210 setup information for 24bpp LCD framebuffer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/fb.h>
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#include <mach/regs-fb.h>
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#include <mach/gpio.h>
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#include <mach/map.h>
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#include <plat/fb.h>
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#include <mach/regs-clock.h>
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#include <plat/gpio-cfg.h>
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void s5pv210_fb_gpio_setup_24bpp(void)
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{
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unsigned int gpio = 0;
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for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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/* Set DISPLAY_CONTROL register for Display path selection.
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*
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* ouput | RGB | I80 | ITU
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* -----------------------------------
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* 00 | MIE | FIMD | FIMD
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* 01 | MDNIE | MDNIE | FIMD
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* 10 | FIMD | FIMD | FIMD
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* 11 | FIMD | FIMD | FIMD
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*/
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writel(0x2, S5P_MDNIE_SEL);
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}
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