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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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36fd4f0249
CR0.TS is cleared by a direct CR0 write in fpu__init_cpu_generic(). We don't need to call clts() two more times right after that. Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com> Cc: Rik van Riel <riel@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: kvm list <kvm@vger.kernel.org> Link: http://lkml.kernel.org/r/476d2d5066eda24838853426ea74c94140b50c85.1477951965.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
290 lines
7.1 KiB
C
290 lines
7.1 KiB
C
/*
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* x86 FPU boot time init code:
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*/
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#include <asm/fpu/internal.h>
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#include <asm/tlbflush.h>
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#include <asm/setup.h>
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#include <asm/cmdline.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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/*
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* Initialize the registers found in all CPUs, CR0 and CR4:
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*/
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static void fpu__init_cpu_generic(void)
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{
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unsigned long cr0;
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unsigned long cr4_mask = 0;
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if (boot_cpu_has(X86_FEATURE_FXSR))
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cr4_mask |= X86_CR4_OSFXSR;
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if (boot_cpu_has(X86_FEATURE_XMM))
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cr4_mask |= X86_CR4_OSXMMEXCPT;
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if (cr4_mask)
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cr4_set_bits(cr4_mask);
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
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if (!boot_cpu_has(X86_FEATURE_FPU))
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cr0 |= X86_CR0_EM;
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write_cr0(cr0);
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/* Flush out any pending x87 state: */
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#ifdef CONFIG_MATH_EMULATION
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if (!boot_cpu_has(X86_FEATURE_FPU))
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fpstate_init_soft(¤t->thread.fpu.state.soft);
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else
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#endif
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asm volatile ("fninit");
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}
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/*
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* Enable all supported FPU features. Called when a CPU is brought online:
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*/
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void fpu__init_cpu(void)
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{
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fpu__init_cpu_generic();
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fpu__init_cpu_xstate();
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}
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/*
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* The earliest FPU detection code.
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*
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* Set the X86_FEATURE_FPU CPU-capability bit based on
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* trying to execute an actual sequence of FPU instructions:
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*/
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static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
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{
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unsigned long cr0;
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u16 fsw, fcw;
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fsw = fcw = 0xffff;
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
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write_cr0(cr0);
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if (!test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
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asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
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: "+m" (fsw), "+m" (fcw));
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if (fsw == 0 && (fcw & 0x103f) == 0x003f)
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set_cpu_cap(c, X86_FEATURE_FPU);
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else
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clear_cpu_cap(c, X86_FEATURE_FPU);
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}
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#ifndef CONFIG_MATH_EMULATION
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if (!boot_cpu_has(X86_FEATURE_FPU)) {
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pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
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for (;;)
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asm volatile("hlt");
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}
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#endif
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}
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/*
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* Boot time FPU feature detection code:
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*/
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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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static void __init fpu__init_system_mxcsr(void)
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{
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unsigned int mask = 0;
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if (boot_cpu_has(X86_FEATURE_FXSR)) {
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/* Static because GCC does not get 16-byte stack alignment right: */
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static struct fxregs_state fxregs __initdata;
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asm volatile("fxsave %0" : "+m" (fxregs));
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mask = fxregs.mxcsr_mask;
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/*
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* If zero then use the default features mask,
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* which has all features set, except the
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* denormals-are-zero feature bit:
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*/
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if (mask == 0)
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mask = 0x0000ffbf;
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}
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mxcsr_feature_mask &= mask;
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}
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/*
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* Once per bootup FPU initialization sequences that will run on most x86 CPUs:
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*/
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static void __init fpu__init_system_generic(void)
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{
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/*
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* Set up the legacy init FPU context. (xstate init might overwrite this
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* with a more modern format, if the CPU supports it.)
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*/
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fpstate_init(&init_fpstate);
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fpu__init_system_mxcsr();
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}
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/*
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* Size of the FPU context state. All tasks in the system use the
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* same context size, regardless of what portion they use.
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* This is inherent to the XSAVE architecture which puts all state
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* components into a single, continuous memory block:
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*/
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unsigned int fpu_kernel_xstate_size;
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EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size);
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/* Get alignment of the TYPE. */
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#define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test)
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/*
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* Enforce that 'MEMBER' is the last field of 'TYPE'.
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*
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* Align the computed size with alignment of the TYPE,
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* because that's how C aligns structs.
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*/
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#define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
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BUILD_BUG_ON(sizeof(TYPE) != ALIGN(offsetofend(TYPE, MEMBER), \
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TYPE_ALIGN(TYPE)))
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/*
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* We append the 'struct fpu' to the task_struct:
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*/
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static void __init fpu__init_task_struct_size(void)
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{
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int task_size = sizeof(struct task_struct);
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/*
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* Subtract off the static size of the register state.
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* It potentially has a bunch of padding.
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*/
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task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state);
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/*
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* Add back the dynamically-calculated register state
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* size.
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*/
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task_size += fpu_kernel_xstate_size;
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/*
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* We dynamically size 'struct fpu', so we require that
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* it be at the end of 'thread_struct' and that
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* 'thread_struct' be at the end of 'task_struct'. If
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* you hit a compile error here, check the structure to
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* see if something got added to the end.
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*/
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CHECK_MEMBER_AT_END_OF(struct fpu, state);
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CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
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CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
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arch_task_struct_size = task_size;
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}
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/*
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* Set up the user and kernel xstate sizes based on the legacy FPU context size.
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*
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* We set this up first, and later it will be overwritten by
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* fpu__init_system_xstate() if the CPU knows about xstates.
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*/
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static void __init fpu__init_system_xstate_size_legacy(void)
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{
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static int on_boot_cpu __initdata = 1;
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WARN_ON_FPU(!on_boot_cpu);
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on_boot_cpu = 0;
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/*
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* Note that xstate sizes might be overwritten later during
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* fpu__init_system_xstate().
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*/
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if (!boot_cpu_has(X86_FEATURE_FPU)) {
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/*
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* Disable xsave as we do not support it if i387
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* emulation is enabled.
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*/
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setup_clear_cpu_cap(X86_FEATURE_XSAVE);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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fpu_kernel_xstate_size = sizeof(struct swregs_state);
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} else {
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if (boot_cpu_has(X86_FEATURE_FXSR))
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fpu_kernel_xstate_size =
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sizeof(struct fxregs_state);
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else
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fpu_kernel_xstate_size =
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sizeof(struct fregs_state);
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}
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fpu_user_xstate_size = fpu_kernel_xstate_size;
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}
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/*
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* Find supported xfeatures based on cpu features and command-line input.
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* This must be called after fpu__init_parse_early_param() is called and
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* xfeatures_mask is enumerated.
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*/
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u64 __init fpu__get_supported_xfeatures_mask(void)
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{
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return XCNTXT_MASK;
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}
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/* Legacy code to initialize eager fpu mode. */
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static void __init fpu__init_system_ctx_switch(void)
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{
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static bool on_boot_cpu __initdata = 1;
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WARN_ON_FPU(!on_boot_cpu);
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on_boot_cpu = 0;
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WARN_ON_FPU(current->thread.fpu.fpstate_active);
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}
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/*
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* We parse fpu parameters early because fpu__init_system() is executed
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* before parse_early_param().
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*/
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static void __init fpu__init_parse_early_param(void)
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{
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if (cmdline_find_option_bool(boot_command_line, "no387"))
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setup_clear_cpu_cap(X86_FEATURE_FPU);
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if (cmdline_find_option_bool(boot_command_line, "nofxsr")) {
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setup_clear_cpu_cap(X86_FEATURE_FXSR);
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setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
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setup_clear_cpu_cap(X86_FEATURE_XMM);
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}
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if (cmdline_find_option_bool(boot_command_line, "noxsave"))
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fpu__xstate_clear_all_cpu_caps();
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if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
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setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
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setup_clear_cpu_cap(X86_FEATURE_XSAVES);
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}
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/*
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* Called on the boot CPU once per system bootup, to set up the initial
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* FPU state that is later cloned into all processes:
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*/
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void __init fpu__init_system(struct cpuinfo_x86 *c)
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{
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fpu__init_parse_early_param();
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fpu__init_system_early_generic(c);
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/*
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* The FPU has to be operational for some of the
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* later FPU init activities:
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*/
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fpu__init_cpu();
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fpu__init_system_generic();
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fpu__init_system_xstate_size_legacy();
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fpu__init_system_xstate();
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fpu__init_task_struct_size();
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fpu__init_system_ctx_switch();
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}
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