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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f5f5195487
This patch adds some endianness-agnostic helpers to convert machine instructions between canonical integer form and in-memory representation. A canonical integer form for representing instructions is also formalised here. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
80 lines
2.5 KiB
C
80 lines
2.5 KiB
C
/*
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* arch/arm/include/asm/opcodes.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_OPCODES_H
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#define __ASM_ARM_OPCODES_H
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#ifndef __ASSEMBLY__
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extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
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#endif
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#define ARM_OPCODE_CONDTEST_FAIL 0
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#define ARM_OPCODE_CONDTEST_PASS 1
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#define ARM_OPCODE_CONDTEST_UNCOND 2
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/*
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* Opcode byteswap helpers
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*
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* These macros help with converting instructions between a canonical integer
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* format and in-memory representation, in an endianness-agnostic manner.
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*
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* __mem_to_opcode_*() convert from in-memory representation to canonical form.
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* __opcode_to_mem_*() convert from canonical form to in-memory representation.
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*
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*
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* Canonical instruction representation:
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*
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* ARM: 0xKKLLMMNN
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* Thumb 16-bit: 0x0000KKLL, where KK < 0xE8
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* Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8
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*
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* There is no way to distinguish an ARM instruction in canonical representation
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* from a Thumb instruction (just as these cannot be distinguished in memory).
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* Where this distinction is important, it needs to be tracked separately.
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*
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* Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
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* represent any valid Thumb-2 instruction. For this range,
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* __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
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*/
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/swab.h>
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#ifdef CONFIG_CPU_ENDIAN_BE8
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#define __opcode_to_mem_arm(x) swab32(x)
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#define __opcode_to_mem_thumb16(x) swab16(x)
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#define __opcode_to_mem_thumb32(x) swahb32(x)
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#else
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#define __opcode_to_mem_arm(x) ((u32)(x))
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#define __opcode_to_mem_thumb16(x) ((u16)(x))
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#define __opcode_to_mem_thumb32(x) swahw32(x)
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#endif
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#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
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#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
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#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
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/* Operations specific to Thumb opcodes */
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/* Instruction size checks: */
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#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
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#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
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/* Operations to construct or split 32-bit Thumb instructions: */
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#define __opcode_thumb32_first(x) ((u16)((x) >> 16))
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#define __opcode_thumb32_second(x) ((u16)(x))
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#define __opcode_thumb32_compose(first, second) \
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(((u32)(u16)(first) << 16) | (u32)(u16)(second))
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARM_OPCODES_H */
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