mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 11:56:40 +07:00
1a93520504
Some pcie cards have problems after a reboot without this. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11446/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
114 lines
2.3 KiB
C
114 lines
2.3 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/pm.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/delay.h>
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#include <linux/reset-controller.h>
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#include <asm/reboot.h>
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#include <asm/mach-ralink/ralink_regs.h>
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/* Reset Control */
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#define SYSC_REG_RESET_CTRL 0x034
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#define RSTCTL_RESET_PCI BIT(26)
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#define RSTCTL_RESET_SYSTEM BIT(0)
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static int ralink_assert_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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u32 val;
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if (id < 8)
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return -1;
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val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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val |= BIT(id);
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rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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return 0;
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}
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static int ralink_deassert_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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u32 val;
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if (id < 8)
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return -1;
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val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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val &= ~BIT(id);
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rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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return 0;
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}
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static int ralink_reset_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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ralink_assert_device(rcdev, id);
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return ralink_deassert_device(rcdev, id);
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}
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static struct reset_control_ops reset_ops = {
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.reset = ralink_reset_device,
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.assert = ralink_assert_device,
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.deassert = ralink_deassert_device,
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};
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static struct reset_controller_dev reset_dev = {
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.ops = &reset_ops,
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.owner = THIS_MODULE,
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.nr_resets = 32,
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.of_reset_n_cells = 1,
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};
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void ralink_rst_init(void)
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{
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reset_dev.of_node = of_find_compatible_node(NULL, NULL,
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"ralink,rt2880-reset");
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if (!reset_dev.of_node)
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pr_err("Failed to find reset controller node");
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else
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reset_controller_register(&reset_dev);
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}
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static void ralink_restart(char *command)
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{
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if (IS_ENABLED(CONFIG_PCI)) {
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rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
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mdelay(50);
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}
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local_irq_disable();
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rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
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unreachable();
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}
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static void ralink_halt(void)
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{
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local_irq_disable();
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unreachable();
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}
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static int __init mips_reboot_setup(void)
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{
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_machine_restart = ralink_restart;
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_machine_halt = ralink_halt;
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return 0;
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}
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arch_initcall(mips_reboot_setup);
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