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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0f0b270f90
Driver for the Common Interface Controller CXD2099AR. Supports the CI of the cineS2 DVB-S2. For now, data is passed through '/dev/dvb/adapterX/sec0': - Encrypted data must be written to 'sec0'. - Decrypted data can be read from 'sec0'. - Setup the CAM using device 'ca0'. Signed-off-by: Ralph Metzler <rjkm@metzlerbros.de> Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
575 lines
12 KiB
C
575 lines
12 KiB
C
/*
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* cxd2099.c: Driver for the CXD2099AR Common Interface Controller
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*
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* Copyright (C) 2010 DigitalDevices UG
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*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA
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* Or, point your browser to http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/version.h>
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/wait.h>
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include "cxd2099.h"
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#define MAX_BUFFER_SIZE 248
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struct cxd {
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struct dvb_ca_en50221 en;
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struct i2c_adapter *i2c;
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u8 adr;
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u8 regs[0x23];
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u8 lastaddress;
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u8 clk_reg_f;
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u8 clk_reg_b;
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int mode;
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u32 bitrate;
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int ready;
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int dr;
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int slot_stat;
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u8 amem[1024];
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int amem_read;
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int cammode;
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struct mutex lock;
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};
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static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
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u8 reg, u8 data)
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{
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u8 m[2] = {reg, data};
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struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
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if (i2c_transfer(adapter, &msg, 1) != 1) {
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printk(KERN_ERR "Failed to write to I2C register %02x@%02x!\n",
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reg, adr);
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return -1;
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}
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return 0;
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}
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static int i2c_write(struct i2c_adapter *adapter, u8 adr,
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u8 *data, u8 len)
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{
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struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
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if (i2c_transfer(adapter, &msg, 1) != 1) {
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printk(KERN_ERR "Failed to write to I2C!\n");
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return -1;
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}
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return 0;
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}
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static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
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u8 reg, u8 *val)
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{
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struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
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.buf = ®, .len = 1 },
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{.addr = adr, .flags = I2C_M_RD,
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.buf = val, .len = 1 } };
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if (i2c_transfer(adapter, msgs, 2) != 2) {
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printk(KERN_ERR "error in i2c_read_reg\n");
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return -1;
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}
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return 0;
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}
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static int i2c_read(struct i2c_adapter *adapter, u8 adr,
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u8 reg, u8 *data, u8 n)
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{
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struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
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.buf = ®, .len = 1 },
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{.addr = adr, .flags = I2C_M_RD,
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.buf = data, .len = n } };
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if (i2c_transfer(adapter, msgs, 2) != 2) {
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printk(KERN_ERR "error in i2c_read\n");
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return -1;
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}
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return 0;
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}
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static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
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{
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int status;
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status = i2c_write_reg(ci->i2c, ci->adr, 0, adr);
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if (!status) {
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ci->lastaddress = adr;
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status = i2c_read(ci->i2c, ci->adr, 1, data, n);
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}
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return status;
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}
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static int read_reg(struct cxd *ci, u8 reg, u8 *val)
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{
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return read_block(ci, reg, val, 1);
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}
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static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
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{
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int status;
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u8 addr[3] = { 2, address&0xff, address>>8 };
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status = i2c_write(ci->i2c, ci->adr, addr, 3);
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if (!status)
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status = i2c_read(ci->i2c, ci->adr, 3, data, n);
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return status;
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}
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static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
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{
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int status;
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u8 addr[3] = { 2, address&0xff, address>>8 };
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status = i2c_write(ci->i2c, ci->adr, addr, 3);
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if (!status) {
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u8 buf[256] = {3};
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memcpy(buf+1, data, n);
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status = i2c_write(ci->i2c, ci->adr, buf, n+1);
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}
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return status;
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}
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static int read_io(struct cxd *ci, u16 address, u8 *val)
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{
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int status;
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u8 addr[3] = { 2, address&0xff, address>>8 };
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status = i2c_write(ci->i2c, ci->adr, addr, 3);
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if (!status)
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status = i2c_read(ci->i2c, ci->adr, 3, val, 1);
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return status;
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}
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static int write_io(struct cxd *ci, u16 address, u8 val)
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{
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int status;
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u8 addr[3] = { 2, address&0xff, address>>8 };
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u8 buf[2] = { 3, val };
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status = i2c_write(ci->i2c, ci->adr, addr, 3);
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if (!status)
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status = i2c_write(ci->i2c, ci->adr, buf, 2);
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return status;
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}
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static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
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{
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int status;
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status = i2c_write_reg(ci->i2c, ci->adr, 0, reg);
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if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
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status = i2c_read_reg(ci->i2c, ci->adr, 1, &ci->regs[reg]);
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ci->regs[reg] = (ci->regs[reg]&(~mask))|val;
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if (!status) {
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ci->lastaddress = reg;
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status = i2c_write_reg(ci->i2c, ci->adr, 1, ci->regs[reg]);
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}
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if (reg == 0x20)
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ci->regs[reg] &= 0x7f;
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return status;
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}
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static int write_reg(struct cxd *ci, u8 reg, u8 val)
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{
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return write_regm(ci, reg, val, 0xff);
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}
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#ifdef BUFFER_MODE
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static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
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{
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int status;
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u8 buf[256] = {1};
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status = i2c_write_reg(ci->i2c, ci->adr, 0, adr);
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if (!status) {
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ci->lastaddress = adr;
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memcpy(buf+1, data, n);
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status = i2c_write(ci->i2c, ci->adr, buf, n+1);
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}
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return status;
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}
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#endif
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static void set_mode(struct cxd *ci, int mode)
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{
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if (mode == ci->mode)
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return;
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switch (mode) {
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case 0x00: /* IO mem */
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write_regm(ci, 0x06, 0x00, 0x07);
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break;
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case 0x01: /* ATT mem */
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write_regm(ci, 0x06, 0x02, 0x07);
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break;
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default:
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break;
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}
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ci->mode = mode;
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}
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static void cam_mode(struct cxd *ci, int mode)
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{
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if (mode == ci->cammode)
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return;
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switch (mode) {
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case 0x00:
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write_regm(ci, 0x20, 0x80, 0x80);
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break;
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case 0x01:
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printk(KERN_INFO "enable cam buffer mode\n");
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/* write_reg(ci, 0x0d, 0x00); */
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/* write_reg(ci, 0x0e, 0x01); */
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write_regm(ci, 0x08, 0x40, 0x40);
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/* read_reg(ci, 0x12, &dummy); */
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write_regm(ci, 0x08, 0x80, 0x80);
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break;
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default:
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break;
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}
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ci->cammode = mode;
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}
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#define CHK_ERROR(s) if ((status = s)) break
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static int init(struct cxd *ci)
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{
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int status;
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mutex_lock(&ci->lock);
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ci->mode = -1;
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do {
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CHK_ERROR(write_reg(ci, 0x00, 0x00));
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CHK_ERROR(write_reg(ci, 0x01, 0x00));
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CHK_ERROR(write_reg(ci, 0x02, 0x10));
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CHK_ERROR(write_reg(ci, 0x03, 0x00));
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CHK_ERROR(write_reg(ci, 0x05, 0xFF));
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CHK_ERROR(write_reg(ci, 0x06, 0x1F));
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CHK_ERROR(write_reg(ci, 0x07, 0x1F));
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CHK_ERROR(write_reg(ci, 0x08, 0x28));
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CHK_ERROR(write_reg(ci, 0x14, 0x20));
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CHK_ERROR(write_reg(ci, 0x09, 0x4D)); /* Input Mode C, BYPass Serial, TIVAL = low, MSB */
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CHK_ERROR(write_reg(ci, 0x0A, 0xA7)); /* TOSTRT = 8, Mode B (gated clock), falling Edge, Serial, POL=HIGH, MSB */
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/* Sync detector */
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CHK_ERROR(write_reg(ci, 0x0B, 0x33));
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CHK_ERROR(write_reg(ci, 0x0C, 0x33));
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CHK_ERROR(write_regm(ci, 0x14, 0x00, 0x0F));
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CHK_ERROR(write_reg(ci, 0x15, ci->clk_reg_b));
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CHK_ERROR(write_regm(ci, 0x16, 0x00, 0x0F));
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CHK_ERROR(write_reg(ci, 0x17, ci->clk_reg_f));
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CHK_ERROR(write_reg(ci, 0x20, 0x28)); /* Integer Divider, Falling Edge, Internal Sync, */
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CHK_ERROR(write_reg(ci, 0x21, 0x00)); /* MCLKI = TICLK/8 */
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CHK_ERROR(write_reg(ci, 0x22, 0x07)); /* MCLKI = TICLK/8 */
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CHK_ERROR(write_regm(ci, 0x20, 0x80, 0x80)); /* Reset CAM state machine */
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CHK_ERROR(write_regm(ci, 0x03, 0x02, 02)); /* Enable IREQA Interrupt */
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CHK_ERROR(write_reg(ci, 0x01, 0x04)); /* Enable CD Interrupt */
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CHK_ERROR(write_reg(ci, 0x00, 0x31)); /* Enable TS1,Hot Swap,Slot A */
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CHK_ERROR(write_regm(ci, 0x09, 0x08, 0x08)); /* Put TS in bypass */
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ci->cammode = -1;
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#ifdef BUFFER_MODE
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cam_mode(ci, 0);
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#endif
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} while (0);
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mutex_unlock(&ci->lock);
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return 0;
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}
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static int read_attribute_mem(struct dvb_ca_en50221 *ca,
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int slot, int address)
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{
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struct cxd *ci = ca->data;
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u8 val;
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mutex_lock(&ci->lock);
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set_mode(ci, 1);
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read_pccard(ci, address, &val, 1);
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mutex_unlock(&ci->lock);
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return val;
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}
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static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
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int address, u8 value)
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{
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struct cxd *ci = ca->data;
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mutex_lock(&ci->lock);
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set_mode(ci, 1);
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write_pccard(ci, address, &value, 1);
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mutex_unlock(&ci->lock);
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return 0;
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}
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static int read_cam_control(struct dvb_ca_en50221 *ca,
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int slot, u8 address)
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{
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struct cxd *ci = ca->data;
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u8 val;
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mutex_lock(&ci->lock);
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set_mode(ci, 0);
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read_io(ci, address, &val);
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mutex_unlock(&ci->lock);
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return val;
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}
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static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
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u8 address, u8 value)
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{
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struct cxd *ci = ca->data;
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mutex_lock(&ci->lock);
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set_mode(ci, 0);
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write_io(ci, address, value);
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mutex_unlock(&ci->lock);
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return 0;
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}
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static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
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{
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struct cxd *ci = ca->data;
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mutex_lock(&ci->lock);
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cam_mode(ci, 0);
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write_reg(ci, 0x00, 0x21);
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write_reg(ci, 0x06, 0x1F);
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write_reg(ci, 0x00, 0x31);
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write_regm(ci, 0x20, 0x80, 0x80);
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write_reg(ci, 0x03, 0x02);
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ci->ready = 0;
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ci->mode = -1;
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{
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int i;
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for (i = 0; i < 100; i++) {
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msleep(10);
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if (ci->ready)
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break;
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}
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}
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mutex_unlock(&ci->lock);
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/* msleep(500); */
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return 0;
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}
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static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
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{
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struct cxd *ci = ca->data;
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printk(KERN_INFO "slot_shutdown\n");
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mutex_lock(&ci->lock);
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/* write_regm(ci, 0x09, 0x08, 0x08); */
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write_regm(ci, 0x20, 0x80, 0x80);
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write_regm(ci, 0x06, 0x07, 0x07);
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ci->mode = -1;
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mutex_unlock(&ci->lock);
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return 0; /* shutdown(ci); */
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}
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static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
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{
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struct cxd *ci = ca->data;
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mutex_lock(&ci->lock);
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write_regm(ci, 0x09, 0x00, 0x08);
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set_mode(ci, 0);
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#ifdef BUFFER_MODE
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cam_mode(ci, 1);
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#endif
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mutex_unlock(&ci->lock);
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return 0;
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}
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static int campoll(struct cxd *ci)
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{
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u8 istat;
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read_reg(ci, 0x04, &istat);
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if (!istat)
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return 0;
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write_reg(ci, 0x05, istat);
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if (istat&0x40) {
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ci->dr = 1;
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printk(KERN_INFO "DR\n");
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}
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if (istat&0x20)
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printk(KERN_INFO "WC\n");
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if (istat&2) {
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u8 slotstat;
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read_reg(ci, 0x01, &slotstat);
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if (!(2&slotstat)) {
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if (!ci->slot_stat) {
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ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_PRESENT;
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write_regm(ci, 0x03, 0x08, 0x08);
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}
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} else {
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if (ci->slot_stat) {
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ci->slot_stat = 0;
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write_regm(ci, 0x03, 0x00, 0x08);
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printk(KERN_INFO "NO CAM\n");
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ci->ready = 0;
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}
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}
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if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
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ci->ready = 1;
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ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
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printk(KERN_INFO "READY\n");
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}
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}
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return 0;
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}
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static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
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{
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struct cxd *ci = ca->data;
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u8 slotstat;
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mutex_lock(&ci->lock);
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campoll(ci);
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read_reg(ci, 0x01, &slotstat);
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mutex_unlock(&ci->lock);
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return ci->slot_stat;
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}
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#ifdef BUFFER_MODE
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static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
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{
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struct cxd *ci = ca->data;
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u8 msb, lsb;
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u16 len;
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mutex_lock(&ci->lock);
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campoll(ci);
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mutex_unlock(&ci->lock);
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printk(KERN_INFO "read_data\n");
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if (!ci->dr)
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return 0;
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mutex_lock(&ci->lock);
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|
read_reg(ci, 0x0f, &msb);
|
|
read_reg(ci, 0x10, &lsb);
|
|
len = (msb<<8)|lsb;
|
|
read_block(ci, 0x12, ebuf, len);
|
|
ci->dr = 0;
|
|
mutex_unlock(&ci->lock);
|
|
|
|
return len;
|
|
}
|
|
|
|
static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
|
|
{
|
|
struct cxd *ci = ca->data;
|
|
|
|
mutex_lock(&ci->lock);
|
|
printk(KERN_INFO "write_data %d\n", ecount);
|
|
write_reg(ci, 0x0d, ecount>>8);
|
|
write_reg(ci, 0x0e, ecount&0xff);
|
|
write_block(ci, 0x11, ebuf, ecount);
|
|
mutex_unlock(&ci->lock);
|
|
return ecount;
|
|
}
|
|
#endif
|
|
|
|
static struct dvb_ca_en50221 en_templ = {
|
|
.read_attribute_mem = read_attribute_mem,
|
|
.write_attribute_mem = write_attribute_mem,
|
|
.read_cam_control = read_cam_control,
|
|
.write_cam_control = write_cam_control,
|
|
.slot_reset = slot_reset,
|
|
.slot_shutdown = slot_shutdown,
|
|
.slot_ts_enable = slot_ts_enable,
|
|
.poll_slot_status = poll_slot_status,
|
|
#ifdef BUFFER_MODE
|
|
.read_data = read_data,
|
|
.write_data = write_data,
|
|
#endif
|
|
|
|
};
|
|
|
|
struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv,
|
|
struct i2c_adapter *i2c)
|
|
{
|
|
struct cxd *ci = 0;
|
|
u32 bitrate = 62000000;
|
|
u8 val;
|
|
|
|
if (i2c_read_reg(i2c, adr, 0, &val) < 0) {
|
|
printk(KERN_ERR "No CXD2099 detected at %02x\n", adr);
|
|
return 0;
|
|
}
|
|
|
|
ci = kmalloc(sizeof(struct cxd), GFP_KERNEL);
|
|
if (!ci)
|
|
return 0;
|
|
memset(ci, 0, sizeof(*ci));
|
|
|
|
mutex_init(&ci->lock);
|
|
ci->i2c = i2c;
|
|
ci->adr = adr;
|
|
ci->lastaddress = 0xff;
|
|
ci->clk_reg_b = 0x4a;
|
|
ci->clk_reg_f = 0x1b;
|
|
ci->bitrate = bitrate;
|
|
|
|
memcpy(&ci->en, &en_templ, sizeof(en_templ));
|
|
ci->en.data = ci;
|
|
init(ci);
|
|
printk(KERN_INFO "Attached CXD2099AR at %02x\n", ci->adr);
|
|
return &ci->en;
|
|
}
|
|
EXPORT_SYMBOL(cxd2099_attach);
|
|
|
|
MODULE_DESCRIPTION("cxd2099");
|
|
MODULE_AUTHOR("Ralph Metzler <rjkm@metzlerbros.de>");
|
|
MODULE_LICENSE("GPL");
|