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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the named license or any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 7 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520170856.731149235@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
388 lines
12 KiB
C
388 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* SiS 300/540/630[S]/730[S],
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* SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
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* XGI V3XT/V5/V8, Z7
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* frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
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*
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* 2D acceleration part
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*
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* Based on the X driver's sis300_accel.h which is
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* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
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* and sis310_accel.h which is
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* Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
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*
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* Author: Thomas Winischhofer <thomas@winischhofer.net>:
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* (see http://www.winischhofer.net/
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* for more information and updates)
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*/
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#ifndef _SISFB_ACCEL_H
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#define _SISFB_ACCEL_H
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/* Guard accelerator accesses with spin_lock_irqsave? Works well without. */
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#undef SISFB_USE_SPINLOCKS
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#ifdef SISFB_USE_SPINLOCKS
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#include <linux/spinlock.h>
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#define CRITBEGIN spin_lock_irqsave(&ivideo->lockaccel, critflags);
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#define CRITEND spin_unlock_irqrestore(&ivideo->lockaccel, critflags);
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#define CRITFLAGS unsigned long critflags;
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#else
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#define CRITBEGIN
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#define CRITEND
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#define CRITFLAGS
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#endif
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/* Definitions for the SIS engine communication. */
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#define PATREGSIZE 384 /* Pattern register size. 384 bytes @ 0x8300 */
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#define BR(x) (0x8200 | (x) << 2)
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#define PBR(x) (0x8300 | (x) << 2)
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/* SiS300 engine commands */
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#define BITBLT 0x00000000 /* Blit */
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#define COLOREXP 0x00000001 /* Color expand */
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#define ENCOLOREXP 0x00000002 /* Enhanced color expand */
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#define MULTIPLE_SCANLINE 0x00000003 /* ? */
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#define LINE 0x00000004 /* Draw line */
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#define TRAPAZOID_FILL 0x00000005 /* Fill trapezoid */
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#define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
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/* Additional engine commands for 315 */
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#define ALPHA_BLEND 0x00000007 /* Alpha blend ? */
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#define A3D_FUNCTION 0x00000008 /* 3D command ? */
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#define CLEAR_Z_BUFFER 0x00000009 /* ? */
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#define GRADIENT_FILL 0x0000000A /* Gradient fill */
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/* source select */
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#define SRCVIDEO 0x00000000 /* source is video RAM */
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#define SRCSYSTEM 0x00000010 /* source is system memory */
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#define SRCCPUBLITBUF SRCSYSTEM /* source is CPU-driven BitBuffer (for color expand) */
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#define SRCAGP 0x00000020 /* source is AGP memory (?) */
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/* Pattern flags */
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#define PATFG 0x00000000 /* foreground color */
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#define PATPATREG 0x00000040 /* pattern in pattern buffer (0x8300) */
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#define PATMONO 0x00000080 /* mono pattern */
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/* blitting direction (300 series only) */
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#define X_INC 0x00010000
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#define X_DEC 0x00000000
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#define Y_INC 0x00020000
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#define Y_DEC 0x00000000
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/* Clipping flags */
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#define NOCLIP 0x00000000
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#define NOMERGECLIP 0x04000000
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#define CLIPENABLE 0x00040000
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#define CLIPWITHOUTMERGE 0x04040000
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/* Transparency */
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#define OPAQUE 0x00000000
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#define TRANSPARENT 0x00100000
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/* ? */
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#define DSTAGP 0x02000000
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#define DSTVIDEO 0x02000000
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/* Subfunctions for Color/Enhanced Color Expansion (315 only) */
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#define COLOR_TO_MONO 0x00100000
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#define AA_TEXT 0x00200000
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/* Some general registers for 315 series */
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#define SRC_ADDR 0x8200
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#define SRC_PITCH 0x8204
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#define AGP_BASE 0x8206 /* color-depth dependent value */
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#define SRC_Y 0x8208
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#define SRC_X 0x820A
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#define DST_Y 0x820C
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#define DST_X 0x820E
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#define DST_ADDR 0x8210
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#define DST_PITCH 0x8214
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#define DST_HEIGHT 0x8216
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#define RECT_WIDTH 0x8218
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#define RECT_HEIGHT 0x821A
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#define PAT_FGCOLOR 0x821C
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#define PAT_BGCOLOR 0x8220
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#define SRC_FGCOLOR 0x8224
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#define SRC_BGCOLOR 0x8228
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#define MONO_MASK 0x822C
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#define LEFT_CLIP 0x8234
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#define TOP_CLIP 0x8236
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#define RIGHT_CLIP 0x8238
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#define BOTTOM_CLIP 0x823A
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#define COMMAND_READY 0x823C
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#define FIRE_TRIGGER 0x8240
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#define PATTERN_REG 0x8300 /* 384 bytes pattern buffer */
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/* Transparent bitblit registers */
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#define TRANS_DST_KEY_HIGH PAT_FGCOLOR
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#define TRANS_DST_KEY_LOW PAT_BGCOLOR
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#define TRANS_SRC_KEY_HIGH SRC_FGCOLOR
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#define TRANS_SRC_KEY_LOW SRC_BGCOLOR
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/* Store queue length in par */
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#define CmdQueLen ivideo->cmdqueuelength
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/* ------------- SiS 300 series -------------- */
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/* BR(16) (0x8240):
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bit 31 2D engine: 1 is idle,
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bit 30 3D engine: 1 is idle,
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bit 29 Command queue: 1 is empty
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bits 28:24: Current CPU driven BitBlt buffer stage bit[4:0]
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bits 15:0: Current command queue length
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*/
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#define SiS300Idle \
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{ \
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while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
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while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
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while((MMIO_IN16(ivideo->mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
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CmdQueLen = MMIO_IN16(ivideo->mmio_vbase, 0x8240); \
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}
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/* (do three times, because 2D engine seems quite unsure about whether or not it's idle) */
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#define SiS300SetupSRCBase(base) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(0), base);\
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CmdQueLen--;
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#define SiS300SetupSRCPitch(pitch) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT16(ivideo->mmio_vbase, BR(1), pitch);\
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CmdQueLen--;
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#define SiS300SetupSRCXY(x,y) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(2), (x)<<16 | (y) );\
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CmdQueLen--;
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#define SiS300SetupDSTBase(base) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(4), base);\
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CmdQueLen--;
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#define SiS300SetupDSTXY(x,y) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(3), (x)<<16 | (y) );\
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CmdQueLen--;
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#define SiS300SetupDSTRect(x,y) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(5), (y)<<16 | (x) );\
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CmdQueLen--;
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#define SiS300SetupDSTColorDepth(bpp) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT16(ivideo->mmio_vbase, BR(1)+2, bpp);\
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CmdQueLen--;
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#define SiS300SetupRect(w,h) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(6), (h)<<16 | (w) );\
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CmdQueLen--;
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#define SiS300SetupPATFG(color) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(7), color);\
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CmdQueLen--;
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#define SiS300SetupPATBG(color) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(8), color);\
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CmdQueLen--;
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#define SiS300SetupSRCFG(color) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(9), color);\
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CmdQueLen--;
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#define SiS300SetupSRCBG(color) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(10), color);\
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CmdQueLen--;
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/* 0x8224 src colorkey high */
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/* 0x8228 src colorkey low */
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/* 0x821c dest colorkey high */
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/* 0x8220 dest colorkey low */
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#define SiS300SetupSRCTrans(color) \
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if(CmdQueLen <= 1) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, 0x8224, color);\
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MMIO_OUT32(ivideo->mmio_vbase, 0x8228, color);\
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CmdQueLen -= 2;
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#define SiS300SetupDSTTrans(color) \
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if(CmdQueLen <= 1) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, 0x821C, color); \
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MMIO_OUT32(ivideo->mmio_vbase, 0x8220, color); \
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CmdQueLen -= 2;
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#define SiS300SetupMONOPAT(p0,p1) \
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if(CmdQueLen <= 1) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(11), p0);\
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MMIO_OUT32(ivideo->mmio_vbase, BR(12), p1);\
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CmdQueLen -= 2;
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#define SiS300SetupClipLT(left,top) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(13), ((left) & 0xFFFF) | (top)<<16 );\
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CmdQueLen--;
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#define SiS300SetupClipRB(right,bottom) \
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if(CmdQueLen <= 0) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\
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CmdQueLen--;
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/* General */
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#define SiS300SetupROP(rop) \
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ivideo->CommandReg = (rop) << 8;
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#define SiS300SetupCMDFlag(flags) \
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ivideo->CommandReg |= (flags);
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#define SiS300DoCMD \
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if(CmdQueLen <= 1) SiS300Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, BR(15), ivideo->CommandReg); \
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MMIO_OUT32(ivideo->mmio_vbase, BR(16), 0);\
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CmdQueLen -= 2;
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/* -------------- SiS 315/330 series --------------- */
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/* Q_STATUS:
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bit 31 = 1: All engines idle and all queues empty
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bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
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bit 29 = 1: 2D engine is idle
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bit 28 = 1: 3D engine is idle
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bit 27 = 1: HW command queue empty
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bit 26 = 1: 2D queue empty
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bit 25 = 1: 3D queue empty
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bit 24 = 1: SW command queue empty
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bits 23:16: 2D counter 3
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bits 15:8: 2D counter 2
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bits 7:0: 2D counter 1
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*/
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#define SiS310Idle \
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{ \
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while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
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while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
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while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
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while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
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CmdQueLen = 0; \
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}
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#define SiS310SetupSRCBase(base) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, SRC_ADDR, base);\
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CmdQueLen--;
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#define SiS310SetupSRCPitch(pitch) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT16(ivideo->mmio_vbase, SRC_PITCH, pitch);\
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CmdQueLen--;
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#define SiS310SetupSRCXY(x,y) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, SRC_Y, (x)<<16 | (y) );\
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CmdQueLen--;
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#define SiS310SetupDSTBase(base) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, DST_ADDR, base);\
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CmdQueLen--;
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#define SiS310SetupDSTXY(x,y) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, DST_Y, (x)<<16 | (y) );\
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CmdQueLen--;
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#define SiS310SetupDSTRect(x,y) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, DST_PITCH, (y)<<16 | (x) );\
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CmdQueLen--;
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#define SiS310SetupDSTColorDepth(bpp) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT16(ivideo->mmio_vbase, AGP_BASE, bpp);\
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CmdQueLen--;
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#define SiS310SetupRect(w,h) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, RECT_WIDTH, (h)<<16 | (w) );\
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CmdQueLen--;
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#define SiS310SetupPATFG(color) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, PAT_FGCOLOR, color);\
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CmdQueLen--;
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#define SiS310SetupPATBG(color) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, PAT_BGCOLOR, color);\
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CmdQueLen--;
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#define SiS310SetupSRCFG(color) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, SRC_FGCOLOR, color);\
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CmdQueLen--;
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#define SiS310SetupSRCBG(color) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, SRC_BGCOLOR, color);\
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CmdQueLen--;
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#define SiS310SetupSRCTrans(color) \
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if(CmdQueLen <= 1) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, TRANS_SRC_KEY_HIGH, color);\
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MMIO_OUT32(ivideo->mmio_vbase, TRANS_SRC_KEY_LOW, color);\
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CmdQueLen -= 2;
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#define SiS310SetupDSTTrans(color) \
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if(CmdQueLen <= 1) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, TRANS_DST_KEY_HIGH, color); \
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MMIO_OUT32(ivideo->mmio_vbase, TRANS_DST_KEY_LOW, color); \
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CmdQueLen -= 2;
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#define SiS310SetupMONOPAT(p0,p1) \
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if(CmdQueLen <= 1) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK, p0);\
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MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK+4, p1);\
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CmdQueLen -= 2;
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#define SiS310SetupClipLT(left,top) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16 );\
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CmdQueLen--;
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#define SiS310SetupClipRB(right,bottom) \
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if(CmdQueLen <= 0) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16 );\
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CmdQueLen--;
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#define SiS310SetupROP(rop) \
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ivideo->CommandReg = (rop) << 8;
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#define SiS310SetupCMDFlag(flags) \
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ivideo->CommandReg |= (flags);
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#define SiS310DoCMD \
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if(CmdQueLen <= 1) SiS310Idle;\
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MMIO_OUT32(ivideo->mmio_vbase, COMMAND_READY, ivideo->CommandReg); \
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MMIO_OUT32(ivideo->mmio_vbase, FIRE_TRIGGER, 0); \
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CmdQueLen -= 2;
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int sisfb_initaccel(struct sis_video_info *ivideo);
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void sisfb_syncaccel(struct sis_video_info *ivideo);
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int fbcon_sis_sync(struct fb_info *info);
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void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
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void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
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#endif
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