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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 07:26:48 +07:00
85835f442e
I've noticed that the 8250/Au1x00 driver (drivers/serial/8250_au1x00.c) doesn't claim UART memory ranges and uses wrong (KSEG1-based) UART addresses instead of the physical ones. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
101 lines
2.6 KiB
C
101 lines
2.6 KiB
C
/*
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* Serial Device Initialisation for Au1x00
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*
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* (C) Copyright Embedded Alley Solutions, Inc 2005
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* Author: Pantelis Antoniou <pantelis@embeddedalley.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/serial_core.h>
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#include <linux/signal.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/serial_8250.h>
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#include <asm/mach-au1x00/au1000.h>
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#include "8250.h"
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#define PORT(_base, _irq) \
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{ \
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.iobase = _base, \
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.membase = (void __iomem *)_base,\
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.mapbase = CPHYSADDR(_base), \
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.irq = _irq, \
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.uartclk = 0, /* filled */ \
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.regshift = 2, \
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.iotype = UPIO_AU, \
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.flags = UPF_SKIP_TEST \
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}
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static struct plat_serial8250_port au1x00_data[] = {
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#if defined(CONFIG_SOC_AU1000)
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PORT(UART0_ADDR, AU1000_UART0_INT),
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PORT(UART1_ADDR, AU1000_UART1_INT),
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PORT(UART2_ADDR, AU1000_UART2_INT),
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PORT(UART3_ADDR, AU1000_UART3_INT),
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#elif defined(CONFIG_SOC_AU1500)
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PORT(UART0_ADDR, AU1500_UART0_INT),
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PORT(UART3_ADDR, AU1500_UART3_INT),
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#elif defined(CONFIG_SOC_AU1100)
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PORT(UART0_ADDR, AU1100_UART0_INT),
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PORT(UART1_ADDR, AU1100_UART1_INT),
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/* The internal UART2 does not exist on the AU1100 processor. */
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PORT(UART3_ADDR, AU1100_UART3_INT),
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#elif defined(CONFIG_SOC_AU1550)
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PORT(UART0_ADDR, AU1550_UART0_INT),
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PORT(UART1_ADDR, AU1550_UART1_INT),
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PORT(UART3_ADDR, AU1550_UART3_INT),
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#elif defined(CONFIG_SOC_AU1200)
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PORT(UART0_ADDR, AU1200_UART0_INT),
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PORT(UART1_ADDR, AU1200_UART1_INT),
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#endif
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{ },
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};
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static struct platform_device au1x00_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_AU1X00,
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.dev = {
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.platform_data = au1x00_data,
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},
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};
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static int __init au1x00_init(void)
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{
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int i;
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unsigned int uartclk;
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/* get uart clock */
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uartclk = get_au1x00_uart_baud_base() * 16;
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/* fill up uartclk */
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for (i = 0; au1x00_data[i].flags ; i++)
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au1x00_data[i].uartclk = uartclk;
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return platform_device_register(&au1x00_device);
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}
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/* XXX: Yes, I know this doesn't yet work. */
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static void __exit au1x00_exit(void)
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{
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platform_device_unregister(&au1x00_device);
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}
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module_init(au1x00_init);
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module_exit(au1x00_exit);
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MODULE_AUTHOR("Pantelis Antoniou <pantelis@embeddedalley.com>");
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MODULE_DESCRIPTION("8250 serial probe module for Au1x000 cards");
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MODULE_LICENSE("GPL");
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