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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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994a08a266
This patch adds Samsung S6E63M0 AMOLED LCD panel driver, connected over spi. It's based on already removed, non-device-tree S6E63M0 driver and panel-samsung-ld9040. It can be found for example in some of Samsung Aries based phones. Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190222175153.20567-2-pawel.mikolaj.chmiel@gmail.com
515 lines
13 KiB
C
515 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* S6E63M0 AMOLED LCD drm_panel driver.
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*
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* Copyright (C) 2019 Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
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* Derived from drivers/gpu/drm/panel-samsung-ld9040.c
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*
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* Andrzej Hajda <a.hajda@samsung.com>
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*/
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_print.h>
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#include <linux/backlight.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <video/mipi_display.h>
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/* Manufacturer Command Set */
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#define MCS_ELVSS_ON 0xb1
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#define MCS_MIECTL1 0xc0
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#define MCS_BCMODE 0xc1
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#define MCS_DISCTL 0xf2
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#define MCS_SRCCTL 0xf6
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#define MCS_IFCTL 0xf7
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#define MCS_PANELCTL 0xF8
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#define MCS_PGAMMACTL 0xfa
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#define NUM_GAMMA_LEVELS 11
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#define GAMMA_TABLE_COUNT 23
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#define DATA_MASK 0x100
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#define MAX_BRIGHTNESS (NUM_GAMMA_LEVELS - 1)
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/* array of gamma tables for gamma value 2.2 */
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static u8 const s6e63m0_gamma_22[NUM_GAMMA_LEVELS][GAMMA_TABLE_COUNT] = {
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x78, 0xEC, 0x3D, 0xC8,
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0xC2, 0xB6, 0xC4, 0xC7, 0xB6, 0xD5, 0xD7,
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0xCC, 0x00, 0x39, 0x00, 0x36, 0x00, 0x51 },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x73, 0x4A, 0x3D, 0xC0,
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0xC2, 0xB1, 0xBB, 0xBE, 0xAC, 0xCE, 0xCF,
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0xC5, 0x00, 0x5D, 0x00, 0x5E, 0x00, 0x82 },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x70, 0x51, 0x3E, 0xBF,
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0xC1, 0xAF, 0xB9, 0xBC, 0xAB, 0xCC, 0xCC,
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0xC2, 0x00, 0x65, 0x00, 0x67, 0x00, 0x8D },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x6C, 0x54, 0x3A, 0xBC,
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0xBF, 0xAC, 0xB7, 0xBB, 0xA9, 0xC9, 0xC9,
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0xBE, 0x00, 0x71, 0x00, 0x73, 0x00, 0x9E },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x69, 0x54, 0x37, 0xBB,
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0xBE, 0xAC, 0xB4, 0xB7, 0xA6, 0xC7, 0xC8,
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0xBC, 0x00, 0x7B, 0x00, 0x7E, 0x00, 0xAB },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x66, 0x55, 0x34, 0xBA,
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0xBD, 0xAB, 0xB1, 0xB5, 0xA3, 0xC5, 0xC6,
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0xB9, 0x00, 0x85, 0x00, 0x88, 0x00, 0xBA },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x63, 0x53, 0x31, 0xB8,
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0xBC, 0xA9, 0xB0, 0xB5, 0xA2, 0xC4, 0xC4,
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0xB8, 0x00, 0x8B, 0x00, 0x8E, 0x00, 0xC2 },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x62, 0x54, 0x30, 0xB9,
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0xBB, 0xA9, 0xB0, 0xB3, 0xA1, 0xC1, 0xC3,
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0xB7, 0x00, 0x91, 0x00, 0x95, 0x00, 0xDA },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x66, 0x58, 0x34, 0xB6,
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0xBA, 0xA7, 0xAF, 0xB3, 0xA0, 0xC1, 0xC2,
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0xB7, 0x00, 0x97, 0x00, 0x9A, 0x00, 0xD1 },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x64, 0x56, 0x33, 0xB6,
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0xBA, 0xA8, 0xAC, 0xB1, 0x9D, 0xC1, 0xC1,
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0xB7, 0x00, 0x9C, 0x00, 0x9F, 0x00, 0xD6 },
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{ MCS_PGAMMACTL, 0x00,
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0x18, 0x08, 0x24, 0x5f, 0x50, 0x2d, 0xB6,
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0xB9, 0xA7, 0xAd, 0xB1, 0x9f, 0xbe, 0xC0,
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0xB5, 0x00, 0xa0, 0x00, 0xa4, 0x00, 0xdb },
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};
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struct s6e63m0 {
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struct device *dev;
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struct drm_panel panel;
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struct backlight_device *bl_dev;
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struct regulator_bulk_data supplies[2];
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struct gpio_desc *reset_gpio;
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bool prepared;
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bool enabled;
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/*
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* This field is tested by functions directly accessing bus before
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* transfer, transfer is skipped if it is set. In case of transfer
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* failure or unexpected response the field is set to error value.
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* Such construct allows to eliminate many checks in higher level
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* functions.
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*/
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int error;
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};
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static const struct drm_display_mode default_mode = {
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.clock = 25628,
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.hdisplay = 480,
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.hsync_start = 480 + 16,
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.hsync_end = 480 + 16 + 2,
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.htotal = 480 + 16 + 2 + 16,
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.vdisplay = 800,
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.vsync_start = 800 + 28,
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.vsync_end = 800 + 28 + 2,
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.vtotal = 800 + 28 + 2 + 1,
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.vrefresh = 60,
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.width_mm = 53,
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.height_mm = 89,
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.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
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};
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static inline struct s6e63m0 *panel_to_s6e63m0(struct drm_panel *panel)
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{
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return container_of(panel, struct s6e63m0, panel);
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}
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static int s6e63m0_clear_error(struct s6e63m0 *ctx)
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{
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int ret = ctx->error;
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ctx->error = 0;
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return ret;
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}
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static int s6e63m0_spi_write_word(struct s6e63m0 *ctx, u16 data)
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{
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struct spi_device *spi = to_spi_device(ctx->dev);
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struct spi_transfer xfer = {
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.len = 2,
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.tx_buf = &data,
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};
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struct spi_message msg;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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return spi_sync(spi, &msg);
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}
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static void s6e63m0_dcs_write(struct s6e63m0 *ctx, const u8 *data, size_t len)
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{
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int ret = 0;
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if (ctx->error < 0 || len == 0)
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return;
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DRM_DEV_DEBUG(ctx->dev, "writing dcs seq: %*ph\n", (int)len, data);
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ret = s6e63m0_spi_write_word(ctx, *data);
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while (!ret && --len) {
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++data;
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ret = s6e63m0_spi_write_word(ctx, *data | DATA_MASK);
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}
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if (ret) {
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DRM_DEV_ERROR(ctx->dev, "error %d writing dcs seq: %*ph\n", ret,
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(int)len, data);
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ctx->error = ret;
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}
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usleep_range(300, 310);
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}
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#define s6e63m0_dcs_write_seq_static(ctx, seq ...) \
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({ \
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static const u8 d[] = { seq }; \
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s6e63m0_dcs_write(ctx, d, ARRAY_SIZE(d)); \
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})
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static void s6e63m0_init(struct s6e63m0 *ctx)
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{
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s6e63m0_dcs_write_seq_static(ctx, MCS_PANELCTL,
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0x01, 0x27, 0x27, 0x07, 0x07, 0x54, 0x9f,
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0x63, 0x86, 0x1a, 0x33, 0x0d, 0x00, 0x00);
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s6e63m0_dcs_write_seq_static(ctx, MCS_DISCTL,
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0x02, 0x03, 0x1c, 0x10, 0x10);
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s6e63m0_dcs_write_seq_static(ctx, MCS_IFCTL,
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0x03, 0x00, 0x00);
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s6e63m0_dcs_write_seq_static(ctx, MCS_PGAMMACTL,
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0x00, 0x18, 0x08, 0x24, 0x64, 0x56, 0x33,
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0xb6, 0xba, 0xa8, 0xac, 0xb1, 0x9d, 0xc1,
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0xc1, 0xb7, 0x00, 0x9c, 0x00, 0x9f, 0x00,
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0xd6);
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s6e63m0_dcs_write_seq_static(ctx, MCS_PGAMMACTL,
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0x01);
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s6e63m0_dcs_write_seq_static(ctx, MCS_SRCCTL,
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0x00, 0x8c, 0x07);
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s6e63m0_dcs_write_seq_static(ctx, 0xb3,
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0xc);
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s6e63m0_dcs_write_seq_static(ctx, 0xb5,
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0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
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0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
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0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
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0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
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0x21, 0x20, 0x1e, 0x1e);
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s6e63m0_dcs_write_seq_static(ctx, 0xb6,
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0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44,
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0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66,
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0x66, 0x66);
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s6e63m0_dcs_write_seq_static(ctx, 0xb7,
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0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
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0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
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0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
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0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
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0x21, 0x20, 0x1e, 0x1e, 0x00, 0x00, 0x11,
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0x22, 0x33, 0x44, 0x44, 0x44, 0x55, 0x55,
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0x66, 0x66, 0x66, 0x66, 0x66, 0x66);
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s6e63m0_dcs_write_seq_static(ctx, 0xb9,
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0x2c, 0x12, 0x0c, 0x0a, 0x10, 0x0e, 0x17,
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0x13, 0x1f, 0x1a, 0x2a, 0x24, 0x1f, 0x1b,
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0x1a, 0x17, 0x2b, 0x26, 0x22, 0x20, 0x3a,
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0x34, 0x30, 0x2c, 0x29, 0x26, 0x25, 0x23,
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0x21, 0x20, 0x1e, 0x1e);
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s6e63m0_dcs_write_seq_static(ctx, 0xba,
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0x00, 0x00, 0x11, 0x22, 0x33, 0x44, 0x44,
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0x44, 0x55, 0x55, 0x66, 0x66, 0x66, 0x66,
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0x66, 0x66);
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s6e63m0_dcs_write_seq_static(ctx, MCS_BCMODE,
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0x4d, 0x96, 0x1d, 0x00, 0x00, 0x01, 0xdf,
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0x00, 0x00, 0x03, 0x1f, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x06,
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0x09, 0x0d, 0x0f, 0x12, 0x15, 0x18);
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s6e63m0_dcs_write_seq_static(ctx, 0xb2,
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0x10, 0x10, 0x0b, 0x05);
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s6e63m0_dcs_write_seq_static(ctx, MCS_MIECTL1,
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0x01);
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s6e63m0_dcs_write_seq_static(ctx, MCS_ELVSS_ON,
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0x0b);
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s6e63m0_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
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}
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static int s6e63m0_power_on(struct s6e63m0 *ctx)
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{
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int ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
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if (ret < 0)
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return ret;
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msleep(25);
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gpiod_set_value(ctx->reset_gpio, 0);
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msleep(120);
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return 0;
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}
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static int s6e63m0_power_off(struct s6e63m0 *ctx)
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{
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int ret;
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gpiod_set_value(ctx->reset_gpio, 1);
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msleep(120);
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ret = regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int s6e63m0_disable(struct drm_panel *panel)
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{
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struct s6e63m0 *ctx = panel_to_s6e63m0(panel);
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if (!ctx->enabled)
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return 0;
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backlight_disable(ctx->bl_dev);
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s6e63m0_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
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msleep(200);
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ctx->enabled = false;
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return 0;
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}
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static int s6e63m0_unprepare(struct drm_panel *panel)
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{
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struct s6e63m0 *ctx = panel_to_s6e63m0(panel);
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int ret;
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if (!ctx->prepared)
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return 0;
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s6e63m0_clear_error(ctx);
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ret = s6e63m0_power_off(ctx);
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if (ret < 0)
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return ret;
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ctx->prepared = false;
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return 0;
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}
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static int s6e63m0_prepare(struct drm_panel *panel)
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{
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struct s6e63m0 *ctx = panel_to_s6e63m0(panel);
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int ret;
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if (ctx->prepared)
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return 0;
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ret = s6e63m0_power_on(ctx);
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if (ret < 0)
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return ret;
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s6e63m0_init(ctx);
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ret = s6e63m0_clear_error(ctx);
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if (ret < 0)
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s6e63m0_unprepare(panel);
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ctx->prepared = true;
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return ret;
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}
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static int s6e63m0_enable(struct drm_panel *panel)
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{
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struct s6e63m0 *ctx = panel_to_s6e63m0(panel);
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if (ctx->enabled)
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return 0;
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s6e63m0_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
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backlight_enable(ctx->bl_dev);
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ctx->enabled = true;
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return 0;
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}
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static int s6e63m0_get_modes(struct drm_panel *panel)
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{
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struct drm_connector *connector = panel->connector;
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(panel->drm, &default_mode);
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if (!mode) {
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DRM_ERROR("failed to add mode %ux%ux@%u\n",
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default_mode.hdisplay, default_mode.vdisplay,
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default_mode.vrefresh);
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return -ENOMEM;
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}
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drm_mode_set_name(mode);
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mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
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drm_mode_probed_add(connector, mode);
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return 1;
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}
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static const struct drm_panel_funcs s6e63m0_drm_funcs = {
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.disable = s6e63m0_disable,
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.unprepare = s6e63m0_unprepare,
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.prepare = s6e63m0_prepare,
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.enable = s6e63m0_enable,
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.get_modes = s6e63m0_get_modes,
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};
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static int s6e63m0_set_brightness(struct backlight_device *bd)
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{
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struct s6e63m0 *ctx = bl_get_data(bd);
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int brightness = bd->props.brightness;
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/* disable and set new gamma */
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s6e63m0_dcs_write(ctx, s6e63m0_gamma_22[brightness],
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ARRAY_SIZE(s6e63m0_gamma_22[brightness]));
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/* update gamma table. */
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s6e63m0_dcs_write_seq_static(ctx, MCS_PGAMMACTL, 0x01);
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return s6e63m0_clear_error(ctx);
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}
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static const struct backlight_ops s6e63m0_backlight_ops = {
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.update_status = s6e63m0_set_brightness,
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};
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static int s6e63m0_backlight_register(struct s6e63m0 *ctx)
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{
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struct backlight_properties props = {
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.type = BACKLIGHT_RAW,
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.brightness = MAX_BRIGHTNESS,
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.max_brightness = MAX_BRIGHTNESS
|
|
};
|
|
struct device *dev = ctx->dev;
|
|
int ret = 0;
|
|
|
|
ctx->bl_dev = devm_backlight_device_register(dev, "panel", dev, ctx,
|
|
&s6e63m0_backlight_ops,
|
|
&props);
|
|
if (IS_ERR(ctx->bl_dev)) {
|
|
ret = PTR_ERR(ctx->bl_dev);
|
|
DRM_DEV_ERROR(dev, "error registering backlight device (%d)\n",
|
|
ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s6e63m0_probe(struct spi_device *spi)
|
|
{
|
|
struct device *dev = &spi->dev;
|
|
struct s6e63m0 *ctx;
|
|
int ret;
|
|
|
|
ctx = devm_kzalloc(dev, sizeof(struct s6e63m0), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
spi_set_drvdata(spi, ctx);
|
|
|
|
ctx->dev = dev;
|
|
ctx->enabled = false;
|
|
ctx->prepared = false;
|
|
|
|
ctx->supplies[0].supply = "vdd3";
|
|
ctx->supplies[1].supply = "vci";
|
|
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
|
|
ctx->supplies);
|
|
if (ret < 0) {
|
|
DRM_DEV_ERROR(dev, "failed to get regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
DRM_DEV_ERROR(dev, "cannot get reset-gpios %ld\n",
|
|
PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
|
|
spi->bits_per_word = 9;
|
|
spi->mode = SPI_MODE_3;
|
|
ret = spi_setup(spi);
|
|
if (ret < 0) {
|
|
DRM_DEV_ERROR(dev, "spi setup failed.\n");
|
|
return ret;
|
|
}
|
|
|
|
drm_panel_init(&ctx->panel);
|
|
ctx->panel.dev = dev;
|
|
ctx->panel.funcs = &s6e63m0_drm_funcs;
|
|
|
|
ret = s6e63m0_backlight_register(ctx);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return drm_panel_add(&ctx->panel);
|
|
}
|
|
|
|
static int s6e63m0_remove(struct spi_device *spi)
|
|
{
|
|
struct s6e63m0 *ctx = spi_get_drvdata(spi);
|
|
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id s6e63m0_of_match[] = {
|
|
{ .compatible = "samsung,s6e63m0" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, s6e63m0_of_match);
|
|
|
|
static struct spi_driver s6e63m0_driver = {
|
|
.probe = s6e63m0_probe,
|
|
.remove = s6e63m0_remove,
|
|
.driver = {
|
|
.name = "panel-samsung-s6e63m0",
|
|
.of_match_table = s6e63m0_of_match,
|
|
},
|
|
};
|
|
module_spi_driver(s6e63m0_driver);
|
|
|
|
MODULE_AUTHOR("Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>");
|
|
MODULE_DESCRIPTION("s6e63m0 LCD Driver");
|
|
MODULE_LICENSE("GPL v2");
|