mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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221c56373e
This patch changes to code to use some of the preprocessor definitions from mii.h over its homegrown equivalents. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@conan.davemloft.net>
285 lines
12 KiB
C
285 lines
12 KiB
C
/*
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* linux/mii.h: definitions for MII-compatible transceivers
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* Originally drivers/net/sunhme.h.
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*
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* Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
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*/
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#ifndef __LINUX_MII_H__
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#define __LINUX_MII_H__
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#include <linux/types.h>
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/* Generic MII registers. */
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#define MII_BMCR 0x00 /* Basic mode control register */
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#define MII_BMSR 0x01 /* Basic mode status register */
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#define MII_PHYSID1 0x02 /* PHYS ID 1 */
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#define MII_PHYSID2 0x03 /* PHYS ID 2 */
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#define MII_ADVERTISE 0x04 /* Advertisement control reg */
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#define MII_LPA 0x05 /* Link partner ability reg */
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#define MII_EXPANSION 0x06 /* Expansion register */
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#define MII_CTRL1000 0x09 /* 1000BASE-T control */
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#define MII_STAT1000 0x0a /* 1000BASE-T status */
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#define MII_ESTATUS 0x0f /* Extended Status */
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#define MII_DCOUNTER 0x12 /* Disconnect counter */
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#define MII_FCSCOUNTER 0x13 /* False carrier counter */
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#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
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#define MII_RERRCOUNTER 0x15 /* Receive error counter */
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#define MII_SREVISION 0x16 /* Silicon revision */
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#define MII_RESV1 0x17 /* Reserved... */
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#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
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#define MII_PHYADDR 0x19 /* PHY address */
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#define MII_RESV2 0x1a /* Reserved... */
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#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
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#define MII_NCONFIG 0x1c /* Network interface config */
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/* Basic mode control register. */
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#define BMCR_RESV 0x003f /* Unused... */
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#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
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#define BMCR_CTST 0x0080 /* Collision test */
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#define BMCR_FULLDPLX 0x0100 /* Full duplex */
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#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
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#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
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#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
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#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
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#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
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#define BMCR_RESET 0x8000 /* Reset the DP83840 */
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/* Basic mode status register. */
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#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
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#define BMSR_JCD 0x0002 /* Jabber detected */
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#define BMSR_LSTATUS 0x0004 /* Link status */
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#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
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#define BMSR_RFAULT 0x0010 /* Remote fault detected */
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#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
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#define BMSR_RESV 0x00c0 /* Unused... */
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#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
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#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
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#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
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#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
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#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
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#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
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#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
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#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
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/* Advertisement control register. */
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#define ADVERTISE_SLCT 0x001f /* Selector bits */
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#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
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#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
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#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
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#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
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#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
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#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
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#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
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#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
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#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
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#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
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#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
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#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
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#define ADVERTISE_RESV 0x1000 /* Unused... */
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#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
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#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
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#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
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#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
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ADVERTISE_CSMA)
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#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
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ADVERTISE_100HALF | ADVERTISE_100FULL)
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/* Link partner ability register. */
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#define LPA_SLCT 0x001f /* Same as advertise selector */
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#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
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#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
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#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
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#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
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#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
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#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
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#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
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#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
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#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
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#define LPA_PAUSE_CAP 0x0400 /* Can pause */
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#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
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#define LPA_RESV 0x1000 /* Unused... */
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#define LPA_RFAULT 0x2000 /* Link partner faulted */
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#define LPA_LPACK 0x4000 /* Link partner acked us */
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#define LPA_NPAGE 0x8000 /* Next page bit */
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#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
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#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
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/* Expansion register for auto-negotiation. */
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#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
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#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
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#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
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#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
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#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
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#define EXPANSION_RESV 0xffe0 /* Unused... */
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#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
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#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
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/* N-way test register. */
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#define NWAYTEST_RESV1 0x00ff /* Unused... */
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#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
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#define NWAYTEST_RESV2 0xfe00 /* Unused... */
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/* 1000BASE-T Control register */
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#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
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#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
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#define CTL1000_AS_MASTER 0x0800
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#define CTL1000_ENABLE_MASTER 0x1000
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/* 1000BASE-T Status register */
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#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
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#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
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#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
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#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
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/* Flow control flags */
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#define FLOW_CTRL_TX 0x01
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#define FLOW_CTRL_RX 0x02
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/* This structure is used in all SIOCxMIIxxx ioctl calls */
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struct mii_ioctl_data {
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__u16 phy_id;
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__u16 reg_num;
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__u16 val_in;
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__u16 val_out;
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};
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#ifdef __KERNEL__
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#include <linux/if.h>
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struct ethtool_cmd;
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struct mii_if_info {
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int phy_id;
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int advertising;
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int phy_id_mask;
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int reg_num_mask;
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unsigned int full_duplex : 1; /* is full duplex? */
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unsigned int force_media : 1; /* is autoneg. disabled? */
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unsigned int supports_gmii : 1; /* are GMII registers supported? */
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struct net_device *dev;
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int (*mdio_read) (struct net_device *dev, int phy_id, int location);
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void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val);
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};
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extern int mii_link_ok (struct mii_if_info *mii);
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extern int mii_nway_restart (struct mii_if_info *mii);
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extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
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extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
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extern int mii_check_gmii_support(struct mii_if_info *mii);
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extern void mii_check_link (struct mii_if_info *mii);
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extern unsigned int mii_check_media (struct mii_if_info *mii,
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unsigned int ok_to_print,
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unsigned int init_media);
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extern int generic_mii_ioctl(struct mii_if_info *mii_if,
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struct mii_ioctl_data *mii_data, int cmd,
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unsigned int *duplex_changed);
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static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
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{
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return (struct mii_ioctl_data *) &rq->ifr_ifru;
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}
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/**
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* mii_nway_result
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* @negotiated: value of MII ANAR and'd with ANLPAR
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*
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* Given a set of MII abilities, check each bit and returns the
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* currently supported media, in the priority order defined by
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* IEEE 802.3u. We use LPA_xxx constants but note this is not the
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* value of LPA solely, as described above.
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*
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* The one exception to IEEE 802.3u is that 100baseT4 is placed
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* between 100T-full and 100T-half. If your phy does not support
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* 100T4 this is fine. If your phy places 100T4 elsewhere in the
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* priority order, you will need to roll your own function.
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*/
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static inline unsigned int mii_nway_result (unsigned int negotiated)
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{
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unsigned int ret;
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if (negotiated & LPA_100FULL)
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ret = LPA_100FULL;
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else if (negotiated & LPA_100BASE4)
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ret = LPA_100BASE4;
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else if (negotiated & LPA_100HALF)
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ret = LPA_100HALF;
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else if (negotiated & LPA_10FULL)
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ret = LPA_10FULL;
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else
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ret = LPA_10HALF;
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return ret;
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}
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/**
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* mii_duplex
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* @duplex_lock: Non-zero if duplex is locked at full
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* @negotiated: value of MII ANAR and'd with ANLPAR
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*
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* A small helper function for a common case. Returns one
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* if the media is operating or locked at full duplex, and
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* returns zero otherwise.
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*/
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static inline unsigned int mii_duplex (unsigned int duplex_lock,
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unsigned int negotiated)
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{
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if (duplex_lock)
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return 1;
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if (mii_nway_result(negotiated) & LPA_DUPLEX)
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return 1;
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return 0;
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}
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/**
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* mii_advertise_flowctrl - get flow control advertisement flags
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* @cap: Flow control capabilities (FLOW_CTRL_RX, FLOW_CTRL_TX or both)
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*/
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static inline u16 mii_advertise_flowctrl(int cap)
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{
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u16 adv = 0;
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if (cap & FLOW_CTRL_RX)
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adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
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if (cap & FLOW_CTRL_TX)
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adv ^= ADVERTISE_PAUSE_ASYM;
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return adv;
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}
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/**
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* mii_resolve_flowctrl_fdx
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* @lcladv: value of MII ADVERTISE register
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* @rmtadv: value of MII LPA register
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*
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* Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
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*/
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static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
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{
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u8 cap = 0;
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if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
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cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
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} else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
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if (lcladv & ADVERTISE_PAUSE_CAP)
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cap = FLOW_CTRL_RX;
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else if (rmtadv & ADVERTISE_PAUSE_CAP)
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cap = FLOW_CTRL_TX;
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}
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return cap;
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}
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#endif /* __KERNEL__ */
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#endif /* __LINUX_MII_H__ */
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