mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 05:30:56 +07:00
b85a3ef4ac
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
53 lines
1.2 KiB
Plaintext
53 lines
1.2 KiB
Plaintext
/*
|
|
* Copyright (C) 2011 Xilinx
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/ {
|
|
model = "Xilinx Zynq EP107";
|
|
compatible = "xlnx,zynq-ep107";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x0 0x10000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
|
|
linux,stdout-path = &uart0;
|
|
};
|
|
|
|
amba {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
intc: interrupt-controller@f8f01000 {
|
|
interrupt-controller;
|
|
compatible = "arm,gic";
|
|
reg = <0xF8F01000 0x1000>;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
uart0: uart@e0000000 {
|
|
compatible = "xlnx,xuartps";
|
|
reg = <0xE0000000 0x1000>;
|
|
interrupts = <59 0>;
|
|
clock = <50000000>;
|
|
};
|
|
};
|
|
};
|