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8bf9437a4e
Tegra210 has a DFLL as well and can share the majority of the code with the Tegra124 implementation. So build the same code for both platforms. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
13 lines
219 B
Plaintext
13 lines
219 B
Plaintext
config TEGRA_CLK_EMC
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def_bool y
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depends on TEGRA124_EMC
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config CLK_TEGRA_BPMP
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def_bool y
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depends on TEGRA_BPMP
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config TEGRA_CLK_DFLL
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depends on ARCH_TEGRA_124_SOC || ARCH_TEGRA_210_SOC
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select PM_OPP
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def_bool y
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