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a3c0f84765
Spectre variant 1 attacks are about this sequence of pseudo-code: index = load(user-manipulated pointer); access(base + index * stride); In order for the cache side-channel to work, the access() must me made to memory which userspace can detect whether cache lines have been loaded. On 32-bit ARM, this must be either user accessible memory, or a kernel mapping of that same user accessible memory. The problem occurs when the load() speculatively loads privileged data, and the subsequent access() is made to user accessible memory. Any load() which makes use of a user-maniplated pointer is a potential problem if the data it has loaded is used in a subsequent access. This also applies for the access() if the data loaded by that access is used by a subsequent access. Harden the get_user() accessors against Spectre attacks by forcing out of bounds addresses to a NULL pointer. This prevents get_user() being used as the load() step above. As a side effect, put_user() will also be affected even though it isn't implicated. Also harden copy_from_user() by redoing the bounds check within the arm_copy_from_user() code, and NULLing the pointer if out of bounds. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
116 lines
2.2 KiB
ArmAsm
116 lines
2.2 KiB
ArmAsm
/*
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* linux/arch/arm/lib/copy_from_user.S
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*
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* Author: Nicolas Pitre
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* Created: Sep 29, 2005
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* Copyright: MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/unwind.h>
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/*
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* Prototype:
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*
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* size_t arm_copy_from_user(void *to, const void *from, size_t n)
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*
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* Purpose:
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*
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* copy a block to kernel memory from user memory
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*
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* Params:
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*
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* to = kernel memory
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* from = user memory
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* n = number of bytes to copy
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*
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* Return value:
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*
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* Number of bytes NOT copied.
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*/
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#ifndef CONFIG_THUMB2_KERNEL
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#define LDR1W_SHIFT 0
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#else
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#define LDR1W_SHIFT 1
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#endif
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#define STR1W_SHIFT 0
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.macro ldr1w ptr reg abort
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ldrusr \reg, \ptr, 4, abort=\abort
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.endm
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.macro ldr4w ptr reg1 reg2 reg3 reg4 abort
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ldr1w \ptr, \reg1, \abort
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ldr1w \ptr, \reg2, \abort
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ldr1w \ptr, \reg3, \abort
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ldr1w \ptr, \reg4, \abort
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.endm
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.macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
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ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
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ldr4w \ptr, \reg5, \reg6, \reg7, \reg8, \abort
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.endm
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.macro ldr1b ptr reg cond=al abort
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ldrusr \reg, \ptr, 1, \cond, abort=\abort
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.endm
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.macro str1w ptr reg abort
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W(str) \reg, [\ptr], #4
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.endm
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.macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
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stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
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.endm
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.macro str1b ptr reg cond=al abort
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str\cond\()b \reg, [\ptr], #1
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.endm
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.macro enter reg1 reg2
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mov r3, #0
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stmdb sp!, {r0, r2, r3, \reg1, \reg2}
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.endm
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.macro usave reg1 reg2
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UNWIND( .save {r0, r2, r3, \reg1, \reg2} )
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.endm
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.macro exit reg1 reg2
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add sp, sp, #8
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ldmfd sp!, {r0, \reg1, \reg2}
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.endm
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.text
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ENTRY(arm_copy_from_user)
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#ifdef CONFIG_CPU_SPECTRE
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get_thread_info r3
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ldr r3, [r3, #TI_ADDR_LIMIT]
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adds ip, r1, r2 @ ip=addr+size
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sub r3, r3, #1 @ addr_limit - 1
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cmpcc ip, r3 @ if (addr+size > addr_limit - 1)
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movcs r1, #0 @ addr = NULL
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csdb
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#endif
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#include "copy_template.S"
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ENDPROC(arm_copy_from_user)
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.pushsection .fixup,"ax"
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.align 0
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copy_abort_preamble
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ldmfd sp!, {r1, r2, r3}
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sub r0, r0, r1
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rsb r0, r0, r2
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copy_abort_end
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.popsection
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