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d51dc61327
navy_flounder has one VCN instance, and the work around is to avoid smu reponse error when setting VCN1 pg for the chip. It is preferred VCN0 and VCN1 are separated for the pg setting so better power efficiency can be achieved. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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.. | ||
hwmgr | ||
inc | ||
smumgr | ||
amd_powerplay.c | ||
amdgpu_smu.c | ||
arcturus_ppt.c | ||
arcturus_ppt.h | ||
Makefile | ||
navi10_ppt.c | ||
navi10_ppt.h | ||
renoir_ppt.c | ||
renoir_ppt.h | ||
sienna_cichlid_ppt.c | ||
sienna_cichlid_ppt.h | ||
smu_internal.h | ||
smu_v11_0.c | ||
smu_v12_0.c |