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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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89713422a7
I noticed that when I inject a fatal error to an endpoint via aer-inject, aer_root_reset() is called as reset_link for a downstream port at upstream of the endpoint: pcieport 0000:00:06.0: AER: Uncorrected (Fatal) error received: id=5401 : pcieport 0000:52:02.0: Root Port link has been reset It externally appears to be working, but internally issues some accesses to PCI_ERR_ROOT_COMMAND/STATUS registers that is for root port so not available on downstream port. This patch introduces default_downstream_reset_link that is a version of aer_root_reset() with no accesses to root port's register. It is used for downstream ports that has no reset_link function its specific. This patch also updates related description in pcieaer-howto.txt. Some minor fixes are included. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/*
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* Copyright (C) 2006 Intel Corp.
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* Tom Long Nguyen (tom.l.nguyen@intel.com)
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* Zhang Yanmin (yanmin.zhang@intel.com)
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*
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*/
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#ifndef _AERDRV_H_
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#define _AERDRV_H_
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#include <linux/workqueue.h>
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#include <linux/pcieport_if.h>
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#include <linux/aer.h>
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#include <linux/interrupt.h>
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#define AER_NONFATAL 0
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#define AER_FATAL 1
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#define AER_CORRECTABLE 2
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#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
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PCI_EXP_RTCTL_SENFEE| \
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PCI_EXP_RTCTL_SEFEE)
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#define ROOT_PORT_INTR_ON_MESG_MASK (PCI_ERR_ROOT_CMD_COR_EN| \
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PCI_ERR_ROOT_CMD_NONFATAL_EN| \
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PCI_ERR_ROOT_CMD_FATAL_EN)
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#define ERR_COR_ID(d) (d & 0xffff)
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#define ERR_UNCOR_ID(d) (d >> 16)
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#define AER_ERROR_SOURCES_MAX 100
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#define AER_LOG_TLP_MASKS (PCI_ERR_UNC_POISON_TLP| \
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PCI_ERR_UNC_ECRC| \
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PCI_ERR_UNC_UNSUP| \
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PCI_ERR_UNC_COMP_ABORT| \
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PCI_ERR_UNC_UNX_COMP| \
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PCI_ERR_UNC_MALF_TLP)
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struct header_log_regs {
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unsigned int dw0;
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unsigned int dw1;
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unsigned int dw2;
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unsigned int dw3;
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};
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#define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */
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struct aer_err_info {
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struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
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int error_dev_num;
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unsigned int id:16;
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unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */
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unsigned int __pad1:5;
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unsigned int multi_error_valid:1;
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unsigned int first_error:5;
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unsigned int __pad2:2;
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unsigned int tlp_header_valid:1;
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unsigned int status; /* COR/UNCOR Error Status */
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unsigned int mask; /* COR/UNCOR Error Mask */
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struct header_log_regs tlp; /* TLP Header */
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};
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struct aer_err_source {
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unsigned int status;
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unsigned int id;
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};
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struct aer_rpc {
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struct pcie_device *rpd; /* Root Port device */
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struct work_struct dpc_handler;
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struct aer_err_source e_sources[AER_ERROR_SOURCES_MAX];
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unsigned short prod_idx; /* Error Producer Index */
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unsigned short cons_idx; /* Error Consumer Index */
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int isr;
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spinlock_t e_lock; /*
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* Lock access to Error Status/ID Regs
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* and error producer/consumer index
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*/
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struct mutex rpc_mutex; /*
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* only one thread could do
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* recovery on the same
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* root port hierarchy
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*/
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wait_queue_head_t wait_release;
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};
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struct aer_broadcast_data {
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enum pci_channel_state state;
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enum pci_ers_result result;
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};
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static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
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enum pci_ers_result new)
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{
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if (new == PCI_ERS_RESULT_NONE)
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return orig;
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switch (orig) {
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case PCI_ERS_RESULT_CAN_RECOVER:
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case PCI_ERS_RESULT_RECOVERED:
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orig = new;
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break;
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case PCI_ERS_RESULT_DISCONNECT:
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if (new == PCI_ERS_RESULT_NEED_RESET)
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orig = new;
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break;
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default:
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break;
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}
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return orig;
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}
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extern struct bus_type pcie_port_bus_type;
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extern void aer_do_secondary_bus_reset(struct pci_dev *dev);
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extern int aer_init(struct pcie_device *dev);
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extern void aer_isr(struct work_struct *work);
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extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
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extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
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extern irqreturn_t aer_irq(int irq, void *context);
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#ifdef CONFIG_ACPI
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extern int aer_osc_setup(struct pcie_device *pciedev);
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#else
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static inline int aer_osc_setup(struct pcie_device *pciedev)
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{
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return 0;
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}
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#endif
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#endif /* _AERDRV_H_ */
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