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6aa7de0591
Please do not apply this to mainline directly, instead please re-run the coccinelle script shown below and apply its output. For several reasons, it is desirable to use {READ,WRITE}_ONCE() in preference to ACCESS_ONCE(), and new code is expected to use one of the former. So far, there's been no reason to change most existing uses of ACCESS_ONCE(), as these aren't harmful, and changing them results in churn. However, for some features, the read/write distinction is critical to correct operation. To distinguish these cases, separate read/write accessors must be used. This patch migrates (most) remaining ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following coccinelle script: ---- // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and // WRITE_ONCE() // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch virtual patch @ depends on patch @ expression E1, E2; @@ - ACCESS_ONCE(E1) = E2 + WRITE_ONCE(E1, E2) @ depends on patch @ expression E; @@ - ACCESS_ONCE(E) + READ_ONCE(E) ---- Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: davem@davemloft.net Cc: linux-arch@vger.kernel.org Cc: mpe@ellerman.id.au Cc: shuah@kernel.org Cc: snitzer@redhat.com Cc: thor.thayer@linux.intel.com Cc: tj@kernel.org Cc: viro@zeniv.linux.org.uk Cc: will.deacon@arm.com Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
250 lines
7.1 KiB
C
250 lines
7.1 KiB
C
/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Intel SCIF driver.
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*
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*/
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#include <linux/circ_buf.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/errno.h>
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#include "scif_rb.h"
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#define scif_rb_ring_cnt(head, tail, size) CIRC_CNT(head, tail, size)
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#define scif_rb_ring_space(head, tail, size) CIRC_SPACE(head, tail, size)
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/**
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* scif_rb_init - Initializes the ring buffer
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* @rb: ring buffer
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* @read_ptr: A pointer to the read offset
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* @write_ptr: A pointer to the write offset
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* @rb_base: A pointer to the base of the ring buffer
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* @size: The size of the ring buffer in powers of two
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*/
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void scif_rb_init(struct scif_rb *rb, u32 *read_ptr, u32 *write_ptr,
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void *rb_base, u8 size)
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{
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rb->rb_base = rb_base;
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rb->size = (1 << size);
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rb->read_ptr = read_ptr;
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rb->write_ptr = write_ptr;
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rb->current_read_offset = *read_ptr;
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rb->current_write_offset = *write_ptr;
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}
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/* Copies a message to the ring buffer -- handles the wrap around case */
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static void memcpy_torb(struct scif_rb *rb, void *header,
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void *msg, u32 size)
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{
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u32 size1, size2;
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if (header + size >= rb->rb_base + rb->size) {
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/* Need to call two copies if it wraps around */
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size1 = (u32)(rb->rb_base + rb->size - header);
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size2 = size - size1;
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memcpy_toio((void __iomem __force *)header, msg, size1);
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memcpy_toio((void __iomem __force *)rb->rb_base,
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msg + size1, size2);
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} else {
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memcpy_toio((void __iomem __force *)header, msg, size);
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}
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}
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/* Copies a message from the ring buffer -- handles the wrap around case */
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static void memcpy_fromrb(struct scif_rb *rb, void *header,
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void *msg, u32 size)
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{
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u32 size1, size2;
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if (header + size >= rb->rb_base + rb->size) {
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/* Need to call two copies if it wraps around */
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size1 = (u32)(rb->rb_base + rb->size - header);
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size2 = size - size1;
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memcpy_fromio(msg, (void __iomem __force *)header, size1);
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memcpy_fromio(msg + size1,
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(void __iomem __force *)rb->rb_base, size2);
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} else {
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memcpy_fromio(msg, (void __iomem __force *)header, size);
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}
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}
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/**
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* scif_rb_space - Query space available for writing to the RB
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* @rb: ring buffer
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*
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* Return: size available for writing to RB in bytes.
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*/
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u32 scif_rb_space(struct scif_rb *rb)
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{
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rb->current_read_offset = *rb->read_ptr;
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/*
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* Update from the HW read pointer only once the peer has exposed the
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* new empty slot. This barrier is paired with the memory barrier
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* scif_rb_update_read_ptr()
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*/
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mb();
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return scif_rb_ring_space(rb->current_write_offset,
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rb->current_read_offset, rb->size);
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}
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/**
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* scif_rb_write - Write a message to the RB
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* @rb: ring buffer
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* @msg: buffer to send the message. Must be at least size bytes long
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* @size: the size (in bytes) to be copied to the RB
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*
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* This API does not block if there isn't enough space in the RB.
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* Returns: 0 on success or -ENOMEM on failure
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*/
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int scif_rb_write(struct scif_rb *rb, void *msg, u32 size)
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{
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void *header;
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if (scif_rb_space(rb) < size)
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return -ENOMEM;
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header = rb->rb_base + rb->current_write_offset;
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memcpy_torb(rb, header, msg, size);
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/*
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* Wait until scif_rb_commit(). Update the local ring
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* buffer data, not the shared data until commit.
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*/
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rb->current_write_offset =
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(rb->current_write_offset + size) & (rb->size - 1);
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return 0;
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}
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/**
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* scif_rb_commit - To submit the message to let the peer fetch it
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* @rb: ring buffer
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*/
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void scif_rb_commit(struct scif_rb *rb)
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{
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/*
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* We must ensure ordering between the all the data committed
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* previously before we expose the new message to the peer by
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* updating the write_ptr. This write barrier is paired with
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* the read barrier in scif_rb_count(..)
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*/
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wmb();
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WRITE_ONCE(*rb->write_ptr, rb->current_write_offset);
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#ifdef CONFIG_INTEL_MIC_CARD
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/*
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* X100 Si bug: For the case where a Core is performing an EXT_WR
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* followed by a Doorbell Write, the Core must perform two EXT_WR to the
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* same address with the same data before it does the Doorbell Write.
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* This way, if ordering is violated for the Interrupt Message, it will
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* fall just behind the first Posted associated with the first EXT_WR.
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*/
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WRITE_ONCE(*rb->write_ptr, rb->current_write_offset);
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#endif
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}
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/**
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* scif_rb_get - To get next message from the ring buffer
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* @rb: ring buffer
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* @size: Number of bytes to be read
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*
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* Return: NULL if no bytes to be read from the ring buffer, otherwise the
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* pointer to the next byte
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*/
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static void *scif_rb_get(struct scif_rb *rb, u32 size)
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{
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void *header = NULL;
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if (scif_rb_count(rb, size) >= size)
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header = rb->rb_base + rb->current_read_offset;
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return header;
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}
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/*
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* scif_rb_get_next - Read from ring buffer.
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* @rb: ring buffer
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* @msg: buffer to hold the message. Must be at least size bytes long
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* @size: Number of bytes to be read
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*
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* Return: number of bytes read if available bytes are >= size, otherwise
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* returns zero.
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*/
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u32 scif_rb_get_next(struct scif_rb *rb, void *msg, u32 size)
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{
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void *header = NULL;
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int read_size = 0;
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header = scif_rb_get(rb, size);
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if (header) {
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u32 next_cmd_offset =
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(rb->current_read_offset + size) & (rb->size - 1);
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read_size = size;
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rb->current_read_offset = next_cmd_offset;
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memcpy_fromrb(rb, header, msg, size);
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}
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return read_size;
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}
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/**
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* scif_rb_update_read_ptr
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* @rb: ring buffer
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*/
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void scif_rb_update_read_ptr(struct scif_rb *rb)
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{
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u32 new_offset;
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new_offset = rb->current_read_offset;
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/*
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* We must ensure ordering between the all the data committed or read
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* previously before we expose the empty slot to the peer by updating
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* the read_ptr. This barrier is paired with the memory barrier in
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* scif_rb_space(..)
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*/
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mb();
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WRITE_ONCE(*rb->read_ptr, new_offset);
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#ifdef CONFIG_INTEL_MIC_CARD
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/*
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* X100 Si Bug: For the case where a Core is performing an EXT_WR
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* followed by a Doorbell Write, the Core must perform two EXT_WR to the
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* same address with the same data before it does the Doorbell Write.
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* This way, if ordering is violated for the Interrupt Message, it will
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* fall just behind the first Posted associated with the first EXT_WR.
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*/
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WRITE_ONCE(*rb->read_ptr, new_offset);
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#endif
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}
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/**
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* scif_rb_count
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* @rb: ring buffer
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* @size: Number of bytes expected to be read
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*
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* Return: number of bytes that can be read from the RB
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*/
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u32 scif_rb_count(struct scif_rb *rb, u32 size)
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{
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if (scif_rb_ring_cnt(rb->current_write_offset,
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rb->current_read_offset,
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rb->size) < size) {
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rb->current_write_offset = *rb->write_ptr;
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/*
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* Update from the HW write pointer if empty only once the peer
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* has exposed the new message. This read barrier is paired
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* with the write barrier in scif_rb_commit(..)
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*/
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smp_rmb();
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}
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return scif_rb_ring_cnt(rb->current_write_offset,
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rb->current_read_offset,
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rb->size);
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}
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