mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 13:37:49 +07:00
e5b3253dcc
Adding over-current-active-high to indicate the over current flag is high active as typically we use active low for over current polarity. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com> Acked-by: Rob Herring <robh@kernel.org>
106 lines
4.7 KiB
Plaintext
106 lines
4.7 KiB
Plaintext
* USB2 ChipIdea USB controller for ci13xxx
|
|
|
|
Required properties:
|
|
- compatible: should be one of:
|
|
"fsl,imx23-usb"
|
|
"fsl,imx27-usb"
|
|
"fsl,imx28-usb"
|
|
"fsl,imx6q-usb"
|
|
"fsl,imx6sl-usb"
|
|
"fsl,imx6sx-usb"
|
|
"fsl,imx6ul-usb"
|
|
"fsl,imx7d-usb"
|
|
"lsi,zevio-usb"
|
|
"qcom,ci-hdrc"
|
|
"chipidea,usb2"
|
|
"xlnx,zynq-usb-2.20a"
|
|
- reg: base address and length of the registers
|
|
- interrupts: interrupt for the USB controller
|
|
|
|
Recommended properies:
|
|
- phy_type: the type of the phy connected to the core. Should be one
|
|
of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
|
|
property the PORTSC register won't be touched.
|
|
- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
|
|
|
|
Deprecated properties:
|
|
- usb-phy: phandle for the PHY device. Use "phys" instead.
|
|
- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
|
|
|
|
Optional properties:
|
|
- clocks: reference to the USB clock
|
|
- phys: reference to the USB PHY
|
|
- phy-names: should be "usb-phy"
|
|
- vbus-supply: reference to the VBUS regulator
|
|
- maximum-speed: limit the maximum connection speed to "full-speed".
|
|
- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
|
|
- itc-setting: interrupt threshold control register control, the setting
|
|
should be aligned with ITC bits at register USBCMD.
|
|
- ahb-burst-config: it is vendor dependent, the required value should be
|
|
aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
|
|
property is used to change AHB burst configuration, check the chipidea
|
|
spec for meaning of each value. If this property is not existed, it
|
|
will use the reset value.
|
|
- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
|
|
(4 bytes), This register represents the maximum length of a the burst
|
|
in 32-bit words while moving data from system memory to the USB
|
|
bus, the value of this property will only take effect if property
|
|
"ahb-burst-config" is set to 0, if this property is missing the reset
|
|
default of the hardware implementation will be used.
|
|
- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
|
|
(4 bytes), This register represents the maximum length of a the burst
|
|
in 32-bit words while moving data from the USB bus to system memory,
|
|
the value of this property will only take effect if property
|
|
"ahb-burst-config" is set to 0, if this property is missing the reset
|
|
default of the hardware implementation will be used.
|
|
- extcon: phandles to external connector devices. First phandle should point to
|
|
external connector, which provide "USB" cable events, the second should point
|
|
to external connector device, which provide "USB-HOST" cable events. If one
|
|
of the external connector devices is not required, empty <0> phandle should
|
|
be specified.
|
|
- phy-clkgate-delay-us: the delay time (us) between putting the PHY into
|
|
low power mode and gating the PHY clock.
|
|
- non-zero-ttctrl-ttha: after setting this property, the value of register
|
|
ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
|
|
value. It needs to be very carefully for setting this property, it is
|
|
recommended that consult with your IC engineer before setting this value.
|
|
On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
|
|
property only affects siTD.
|
|
If this property is not set, the max packet size is 1023 bytes, and if
|
|
the total of packet size for pervious transactions are more than 256 bytes,
|
|
it can't accept any transactions within this frame. The use case is single
|
|
transaction, but higher frame rate.
|
|
If this property is set, the max packet size is 188 bytes, it can handle
|
|
more transactions than above case, it can accept transactions until it
|
|
considers the left room size within frame is less than 188 bytes, software
|
|
needs to make sure it does not send more than 90%
|
|
maximum_periodic_data_per_frame. The use case is multiple transactions, but
|
|
less frame rate.
|
|
|
|
i.mx specific properties
|
|
- fsl,usbmisc: phandler of non-core register device, with one
|
|
argument that indicate usb controller index
|
|
- disable-over-current: disable over current detect
|
|
- over-current-active-high: over current signal polarity is high active,
|
|
typically over current signal polarity is low active.
|
|
- external-vbus-divider: enables off-chip resistor divider for Vbus
|
|
|
|
Example:
|
|
|
|
usb@f7ed0000 {
|
|
compatible = "chipidea,usb2";
|
|
reg = <0xf7ed0000 0x10000>;
|
|
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&chip CLKID_USB0>;
|
|
phys = <&usb_phy0>;
|
|
phy-names = "usb-phy";
|
|
vbus-supply = <®_usb0_vbus>;
|
|
itc-setting = <0x4>; /* 4 micro-frames */
|
|
/* Incremental burst of unspecified length */
|
|
ahb-burst-config = <0x0>;
|
|
tx-burst-size-dword = <0x10>; /* 64 bytes */
|
|
rx-burst-size-dword = <0x10>;
|
|
extcon = <0>, <&usb_id>;
|
|
phy-clkgate-delay-us = <400>;
|
|
};
|