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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 15:26:41 +07:00
e2fcf74f3d
The nommu code has regressed somewhat in that 29BIT gets set for the SH-2/2A configs regardless of the fact that they are really 32BIT sans MMU or PMB. This does a bit of tidying to get nommu properly selecting 32BIT as it was before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
#include <linux/init.h>
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#include <linux/module.h>
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#include <asm/sizes.h>
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#include <asm/page.h>
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#include <asm/addrspace.h>
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/*
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* This is the offset of the uncached section from its cached alias.
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*
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* Legacy platforms handle trivial transitions between cached and
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* uncached segments by making use of the 1:1 mapping relationship in
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* 512MB lowmem, others via a special uncached mapping.
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*
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* Default value only valid in 29 bit mode, in 32bit mode this will be
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* updated by the early PMB initialization code.
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*/
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unsigned long cached_to_uncached = SZ_512M;
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unsigned long uncached_size = SZ_512M;
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unsigned long uncached_start, uncached_end;
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EXPORT_SYMBOL(uncached_start);
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EXPORT_SYMBOL(uncached_end);
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int virt_addr_uncached(unsigned long kaddr)
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{
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return (kaddr >= uncached_start) && (kaddr < uncached_end);
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}
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EXPORT_SYMBOL(virt_addr_uncached);
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void __init uncached_init(void)
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{
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#if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)
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uncached_start = P2SEG;
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#else
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uncached_start = memory_end;
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#endif
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uncached_end = uncached_start + uncached_size;
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}
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void __init uncached_resize(unsigned long size)
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{
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uncached_size = size;
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uncached_end = uncached_start + uncached_size;
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}
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