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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e86ddd181e
Add set of fixed, external input clocks definitions for TSIPCLKA, TSIPCLKB clocks. Such clocks can be used as reference clocks for some HW modules (as cpts, for example) by configuring corresponding clock muxes. For these clocks real frequencies have to be defined in board files. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
95 lines
2.4 KiB
Plaintext
95 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Keystone 2 Edison SoC specific device tree
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*
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* Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
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*/
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clocks {
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mainpllclk: mainpllclk@2310110 {
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#clock-cells = <0>;
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compatible = "ti,keystone,main-pll-clock";
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clocks = <&refclksys>;
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reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
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reg-names = "control", "multiplier", "post-divider";
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};
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papllclk: papllclk@2620358 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkpass>;
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clock-output-names = "papllclk";
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reg = <0x02620358 4>;
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reg-names = "control";
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};
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ddr3apllclk: ddr3apllclk@2620360 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkddr3a>;
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clock-output-names = "ddr-3a-pll-clk";
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reg = <0x02620360 4>;
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reg-names = "control";
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};
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clkusb1: clkusb1@2350004 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "usb1";
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reg = <0x02350004 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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clkhyperlink0: clkhyperlink0@2350030 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "hyperlink-0";
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reg = <0x02350030 0xb00>, <0x02350014 0x400>;
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reg-names = "control", "domain";
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domain-id = <5>;
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};
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clkpcie1: clkpcie1@235006c {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk12>;
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clock-output-names = "pcie1";
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reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
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reg-names = "control", "domain";
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domain-id = <18>;
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};
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clkxge: clkxge@23500c8 {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk13>;
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clock-output-names = "xge";
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reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
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reg-names = "control", "domain";
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domain-id = <29>;
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};
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/*
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* Below are set of fixed, input clocks definitions,
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* for which real frequencies have to be defined in board files.
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* Those clocks can be used as reference clocks for some HW modules
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* (as cpts, for example) by configuring corresponding clock muxes.
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*/
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tsipclka: tsipclka {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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clock-output-names = "tsipclka";
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};
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tsipclkb: tsipclkb {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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clock-output-names = "tsipclkb";
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};
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};
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