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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2125212785
The patch adds the following interfaces according the SMARC Spec 1.1
[1] and provided schematics:
- SMARC SPI0/1
Note: Since Kontron still uses silicon revisions below 1.3 they have
add a spi-nor to implement Workaround #1 of erratum ERR006282.
- SMARC SDIO
- SMARC LCD
- SMARC HDMI
- SMARC Management pins
Note: Kontron don't route all of these pins to the i.MX6, some are
routed to the SoM CPLD.
- SMARC GPIO
- SMARC CSI Camera
Note: As specified in [1] the data lanes are shared to cover the
csi and the parallel case. The case depends on the baseboard so
muxing the data lanes is not part of this patch.
- SMARC I2S
- SMARC Watchdog
Note: The watchdog output pin is routed to the CPLD and the SMARC
header. The CPLD performs a reset after a 30s timeout so we
need to enable the watchdog per default.
- SMARC module eeprom
Due to the lack of hardware not all of these interfaces are tesetd.
[1] https://sget.org/standards/smarc
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
37 lines
972 B
Plaintext
37 lines
972 B
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
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*/
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#include "imx6q.dtsi"
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#include "imx6qdl-kontron-samx6i.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Kontron SMARC sAMX6i Quad/Dual";
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compatible = "kontron,imx6q-samx6i", "fsl,imx6q";
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};
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/* Quad/Dual SoMs have 3 chip-select signals */
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&ecspi4 {
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fsl,spi-num-chipselects = <3>;
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cs-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>,
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<&gpio3 29 GPIO_ACTIVE_HIGH>,
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<&gpio3 25 GPIO_ACTIVE_HIGH>;
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};
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&pinctrl_ecspi4 {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
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MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
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MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
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/* SPI4_IMX_CS2# - connected to internal flash */
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MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0
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/* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */
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MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
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/* SPI4_CS3# - connected to SMARC SPI0_CS1# */
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MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0
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>;
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};
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