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linux_dsm_epyc7002/arch/arm/boot/dts/imx53-cx9020.dts
Thomas Gleixner fcaf20360a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159 
Based on 1 normalized pattern(s):

  the code contained herein is licensed under the gnu general public
  license you may obtain a copy of the gnu general public license
  version 2 or later at the following locations http www opensource
  org licenses gpl license html http www gnu org copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2017 Beckhoff Automation GmbH & Co. KG
* based on imx53-qsb.dts
*/
/dts-v1/;
#include "imx53.dtsi"
/ {
model = "Beckhoff CX9020 Embedded PC";
compatible = "bhf,cx9020", "fsl,imx53";
chosen {
stdout-path = &uart2;
};
memory@70000000 {
device_type = "memory";
reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
};
display-0 {
#address-cells =<1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp0>;
port@0 {
reg = <0>;
display0_in: endpoint {
remote-endpoint = <&ipu_di0_disp0>;
};
};
port@1 {
reg = <1>;
display0_out: endpoint {
remote-endpoint = <&tfp410_in>;
};
};
};
dvi-connector {
compatible = "dvi-connector";
ddc-i2c-bus = <&i2c2>;
digital;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
dvi-converter {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,tfp410";
port@0 {
reg = <0>;
tfp410_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint {
remote-endpoint = <&dvi_connector_in>;
};
};
};
leds {
compatible = "gpio-leds";
pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};
};
regulator-3p2v {
compatible = "regulator-fixed";
regulator-name = "3P2V";
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3200000>;
regulator-always-on;
};
reg_usb_vbus: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&ipu_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,dte-mode;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_vbus>;
phy_type = "utmi";
status = "okay";
};
&usbotg {
dr_mode = "peripheral";
status = "okay";
};
&vpu {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_CLKO 0x1c4
MX53_PAD_GPIO_16__I2C3_SDA 0x1c4
MX53_PAD_EIM_D22__GPIO3_22 0x1c4
MX53_PAD_EIM_D23__GPIO3_23 0x1e4
MX53_PAD_EIM_D24__GPIO3_24 0x1e4
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4
MX53_PAD_EIM_D17__GPIO3_17 0x1e4
MX53_PAD_GPIO_3__GPIO1_3 0x1c4
>;
};
pinctrl_esdhc2: esdhc2grp {
fsl,pins = <
MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4
MX53_PAD_EIM_D20__GPIO3_20 0x1e4
MX53_PAD_GPIO_8__GPIO1_8 0x1c4
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
>;
};
pinctrl_ipu_disp0: ipudisp0grp {
fsl,pins = <
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4
MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4
MX53_PAD_EIM_D28__UART2_RTS 0x1e4
MX53_PAD_EIM_D29__UART2_CTS 0x1e4
>;
};
};
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