mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
4d3ac66624
The change fixes potential oops while accessing iomem on invalid
address, if devm_ioremap_resource() fails due to some reason.
The devm_ioremap_resource() function returns ERR_PTR() and never
returns NULL, which makes useless a following check for NULL.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Fixes: 5e63dcc74b ("clk: bcm2835: Add a driver for the auxiliary peripheral clock gates")
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
86 lines
2.5 KiB
C
86 lines
2.5 KiB
C
/*
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* Copyright (C) 2015 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clk/bcm2835.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/clock/bcm2835-aux.h>
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#define BCM2835_AUXIRQ 0x00
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#define BCM2835_AUXENB 0x04
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static int bcm2835_aux_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct clk_onecell_data *onecell;
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const char *parent;
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struct clk *parent_clk;
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struct resource *res;
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void __iomem *reg, *gate;
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parent_clk = devm_clk_get(dev, NULL);
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if (IS_ERR(parent_clk))
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return PTR_ERR(parent_clk);
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parent = __clk_get_name(parent_clk);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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reg = devm_ioremap_resource(dev, res);
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
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if (!onecell)
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return -ENOMEM;
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onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
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onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT,
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sizeof(*onecell->clks), GFP_KERNEL);
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if (!onecell->clks)
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return -ENOMEM;
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gate = reg + BCM2835_AUXENB;
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onecell->clks[BCM2835_AUX_CLOCK_UART] =
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clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
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onecell->clks[BCM2835_AUX_CLOCK_SPI1] =
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clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
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onecell->clks[BCM2835_AUX_CLOCK_SPI2] =
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clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
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of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell);
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return 0;
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}
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static const struct of_device_id bcm2835_aux_clk_of_match[] = {
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{ .compatible = "brcm,bcm2835-aux", },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
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static struct platform_driver bcm2835_aux_clk_driver = {
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.driver = {
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.name = "bcm2835-aux-clk",
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.of_match_table = bcm2835_aux_clk_of_match,
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},
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.probe = bcm2835_aux_clk_probe,
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};
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builtin_platform_driver(bcm2835_aux_clk_driver);
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MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
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MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
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MODULE_LICENSE("GPL v2");
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