mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 18:25:04 +07:00
767c0f3aed
SH7372 uses two independent mechanisms for ensuring that power domains will never be turned off: the stay_on flag and the "always on" domain governor. Moreover, the "always on" governor is only taken into accout by runtime PM code paths, while the stay_on flag affects all attempts to turn the given domain off. Thus setting the stay_on flag causes the "always on" governor to be unnecessary, which is quite confusing. However, the stay_on flag is currently only set for two domains: A3SP and A4S. Moreover, it only is set for the A3SP domain if console_suspend_enabled is set, so stay_on won't be necessary for that domain any more if console_suspend_enabled is checked directly in its .suspend() routine. [This requires domain .suspend() to return a result, but that is a minor modification.] Analogously, stay_on won't be necessary for the A4S domain if it's .suspend() routine always returns an error code. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Magnus Damm <damm@opensource.se>
522 lines
17 KiB
C
522 lines
17 KiB
C
/*
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* Copyright (C) 2010 Renesas Solutions Corp.
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*
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_SH7372_H__
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#define __ASM_SH7372_H__
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#include <linux/sh_clk.h>
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#include <linux/pm_domain.h>
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/*
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* Pin Function Controller:
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* GPIO_FN_xx - GPIO used to select pin function
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* GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
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*/
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enum {
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/* PORT */
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GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
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GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
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GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
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GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
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GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
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GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
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GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
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GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
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GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
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GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
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GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
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GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
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GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
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GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
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GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
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GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
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GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
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GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
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GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
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GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
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GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
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GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
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GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
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GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
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GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
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GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
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GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
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GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
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GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
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GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
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GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
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GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
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GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
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GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
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GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
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GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
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GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
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GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
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GPIO_PORT190,
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/* IRQ */
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GPIO_FN_IRQ0_6, /* PORT 6 */
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GPIO_FN_IRQ0_162, /* PORT 162 */
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GPIO_FN_IRQ1, /* PORT 12 */
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GPIO_FN_IRQ2_4, /* PORT 4 */
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GPIO_FN_IRQ2_5, /* PORT 5 */
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GPIO_FN_IRQ3_8, /* PORT 8 */
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GPIO_FN_IRQ3_16, /* PORT 16 */
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GPIO_FN_IRQ4_17, /* PORT 17 */
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GPIO_FN_IRQ4_163, /* PORT 163 */
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GPIO_FN_IRQ5, /* PORT 18 */
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GPIO_FN_IRQ6_39, /* PORT 39 */
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GPIO_FN_IRQ6_164, /* PORT 164 */
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GPIO_FN_IRQ7_40, /* PORT 40 */
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GPIO_FN_IRQ7_167, /* PORT 167 */
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GPIO_FN_IRQ8_41, /* PORT 41 */
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GPIO_FN_IRQ8_168, /* PORT 168 */
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GPIO_FN_IRQ9_42, /* PORT 42 */
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GPIO_FN_IRQ9_169, /* PORT 169 */
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GPIO_FN_IRQ10, /* PORT 65 */
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GPIO_FN_IRQ11, /* PORT 67 */
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GPIO_FN_IRQ12_80, /* PORT 80 */
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GPIO_FN_IRQ12_137, /* PORT 137 */
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GPIO_FN_IRQ13_81, /* PORT 81 */
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GPIO_FN_IRQ13_145, /* PORT 145 */
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GPIO_FN_IRQ14_82, /* PORT 82 */
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GPIO_FN_IRQ14_146, /* PORT 146 */
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GPIO_FN_IRQ15_83, /* PORT 83 */
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GPIO_FN_IRQ15_147, /* PORT 147 */
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GPIO_FN_IRQ16_84, /* PORT 84 */
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GPIO_FN_IRQ16_170, /* PORT 170 */
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GPIO_FN_IRQ17, /* PORT 85 */
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GPIO_FN_IRQ18, /* PORT 86 */
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GPIO_FN_IRQ19, /* PORT 87 */
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GPIO_FN_IRQ20, /* PORT 92 */
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GPIO_FN_IRQ21, /* PORT 93 */
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GPIO_FN_IRQ22, /* PORT 94 */
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GPIO_FN_IRQ23, /* PORT 95 */
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GPIO_FN_IRQ24, /* PORT 112 */
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GPIO_FN_IRQ25, /* PORT 119 */
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GPIO_FN_IRQ26_121, /* PORT 121 */
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GPIO_FN_IRQ26_172, /* PORT 172 */
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GPIO_FN_IRQ27_122, /* PORT 122 */
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GPIO_FN_IRQ27_180, /* PORT 180 */
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GPIO_FN_IRQ28_123, /* PORT 123 */
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GPIO_FN_IRQ28_181, /* PORT 181 */
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GPIO_FN_IRQ29_129, /* PORT 129 */
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GPIO_FN_IRQ29_182, /* PORT 182 */
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GPIO_FN_IRQ30_130, /* PORT 130 */
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GPIO_FN_IRQ30_183, /* PORT 183 */
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GPIO_FN_IRQ31_138, /* PORT 138 */
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GPIO_FN_IRQ31_184, /* PORT 184 */
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/*
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* MSIOF0 (PORT 36, 37, 38, 39
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* 40, 41, 42, 43, 44, 45)
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*/
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GPIO_FN_MSIOF0_TSYNC, GPIO_FN_MSIOF0_TSCK,
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GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_RSCK,
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GPIO_FN_MSIOF0_RSYNC, GPIO_FN_MSIOF0_MCK0,
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GPIO_FN_MSIOF0_MCK1, GPIO_FN_MSIOF0_SS1,
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GPIO_FN_MSIOF0_SS2, GPIO_FN_MSIOF0_TXD,
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/*
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* MSIOF1 (PORT 39, 40, 41, 42, 43, 44
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* 84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
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*/
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GPIO_FN_MSIOF1_TSCK_39, GPIO_FN_MSIOF1_TSYNC_40,
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GPIO_FN_MSIOF1_TSCK_88, GPIO_FN_MSIOF1_TSYNC_89,
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GPIO_FN_MSIOF1_TXD_41, GPIO_FN_MSIOF1_RXD_42,
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GPIO_FN_MSIOF1_TXD_90, GPIO_FN_MSIOF1_RXD_91,
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GPIO_FN_MSIOF1_SS1_43, GPIO_FN_MSIOF1_SS2_44,
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GPIO_FN_MSIOF1_SS1_92, GPIO_FN_MSIOF1_SS2_93,
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GPIO_FN_MSIOF1_RSCK, GPIO_FN_MSIOF1_RSYNC,
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GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
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/*
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* MSIOF2 (PORT 134, 135, 136, 137, 138, 139
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* 148, 149, 150, 151)
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*/
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GPIO_FN_MSIOF2_RSCK, GPIO_FN_MSIOF2_RSYNC,
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GPIO_FN_MSIOF2_MCK0, GPIO_FN_MSIOF2_MCK1,
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GPIO_FN_MSIOF2_SS1, GPIO_FN_MSIOF2_SS2,
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GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_TSCK,
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GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TXD,
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/* MSIOF3 (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
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GPIO_FN_BBIF1_RXD, GPIO_FN_BBIF1_TSYNC,
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GPIO_FN_BBIF1_TSCK, GPIO_FN_BBIF1_TXD,
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GPIO_FN_BBIF1_RSCK, GPIO_FN_BBIF1_RSYNC,
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GPIO_FN_BBIF1_FLOW, GPIO_FN_BB_RX_FLOW_N,
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/* MSIOF4 (PORT 0, 1, 2, 3) */
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GPIO_FN_BBIF2_TSCK1, GPIO_FN_BBIF2_TSYNC1,
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GPIO_FN_BBIF2_TXD1, GPIO_FN_BBIF2_RXD,
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/* FSI (PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
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GPIO_FN_FSIACK, GPIO_FN_FSIBCK,
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GPIO_FN_FSIAILR, GPIO_FN_FSIAIBT,
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GPIO_FN_FSIAISLD, GPIO_FN_FSIAOMC,
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GPIO_FN_FSIAOLR, GPIO_FN_FSIAOBT,
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GPIO_FN_FSIAOSLD, GPIO_FN_FSIASPDIF_11,
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GPIO_FN_FSIASPDIF_15,
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/* FMSI (PORT 12, 13, 14, 15, 16, 17, 18, 65) */
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GPIO_FN_FMSOCK, GPIO_FN_FMSOOLR,
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GPIO_FN_FMSIOLR, GPIO_FN_FMSOOBT,
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GPIO_FN_FMSIOBT, GPIO_FN_FMSOSLD,
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GPIO_FN_FMSOILR, GPIO_FN_FMSIILR,
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GPIO_FN_FMSOIBT, GPIO_FN_FMSIIBT,
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GPIO_FN_FMSISLD, GPIO_FN_FMSICK,
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/* SCIFA0 (PORT 152, 153, 156, 157, 158) */
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GPIO_FN_SCIFA0_TXD, GPIO_FN_SCIFA0_RXD,
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GPIO_FN_SCIFA0_SCK, GPIO_FN_SCIFA0_RTS,
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GPIO_FN_SCIFA0_CTS,
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/* SCIFA1 (PORT 154, 155, 159, 160, 161) */
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GPIO_FN_SCIFA1_TXD, GPIO_FN_SCIFA1_RXD,
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GPIO_FN_SCIFA1_SCK, GPIO_FN_SCIFA1_RTS,
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GPIO_FN_SCIFA1_CTS,
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/* SCIFA2 (PORT 94, 95, 96, 97, 98) */
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GPIO_FN_SCIFA2_CTS1, GPIO_FN_SCIFA2_RTS1,
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GPIO_FN_SCIFA2_TXD1, GPIO_FN_SCIFA2_RXD1,
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GPIO_FN_SCIFA2_SCK1,
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/* SCIFA3 (PORT 43, 44,
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140, 141, 142, 143, 144) */
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GPIO_FN_SCIFA3_CTS_43, GPIO_FN_SCIFA3_CTS_140,
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GPIO_FN_SCIFA3_RTS_44, GPIO_FN_SCIFA3_RTS_141,
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GPIO_FN_SCIFA3_SCK, GPIO_FN_SCIFA3_TXD,
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GPIO_FN_SCIFA3_RXD,
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/* SCIFA4 (PORT 5, 6) */
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GPIO_FN_SCIFA4_RXD, GPIO_FN_SCIFA4_TXD,
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/* SCIFA5 (PORT 8, 12) */
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GPIO_FN_SCIFA5_RXD, GPIO_FN_SCIFA5_TXD,
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/* SCIFB (PORT 162, 163, 164, 165, 166) */
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GPIO_FN_SCIFB_SCK, GPIO_FN_SCIFB_RTS,
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GPIO_FN_SCIFB_CTS, GPIO_FN_SCIFB_TXD,
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GPIO_FN_SCIFB_RXD,
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/*
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* CEU (PORT 16, 17,
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* 100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
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* 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
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* 120)
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*/
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GPIO_FN_VIO_HD, GPIO_FN_VIO_CKO1, GPIO_FN_VIO_CKO2,
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GPIO_FN_VIO_VD, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
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GPIO_FN_VIO_CKO,
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GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
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GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
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GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
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GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
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GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
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GPIO_FN_VIO_D15,
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/* USB0 (PORT 113, 114, 115, 116, 117, 167) */
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GPIO_FN_IDIN_0, GPIO_FN_EXTLP_0,
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GPIO_FN_OVCN2_0, GPIO_FN_PWEN_0,
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GPIO_FN_OVCN_0, GPIO_FN_VBUS0_0,
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/* USB1 (PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
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GPIO_FN_IDIN_1_18, GPIO_FN_IDIN_1_113,
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GPIO_FN_PWEN_1_115, GPIO_FN_PWEN_1_138,
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GPIO_FN_OVCN_1_114, GPIO_FN_OVCN_1_162,
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GPIO_FN_EXTLP_1, GPIO_FN_OVCN2_1,
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GPIO_FN_VBUS0_1,
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/* GPIO (PORT 41, 42, 43, 44) */
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GPIO_FN_GPI0, GPIO_FN_GPI1, GPIO_FN_GPO0, GPIO_FN_GPO1,
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/*
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* BSC (PORT 19,
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* 20, 21, 22, 25, 26, 27, 28, 29,
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* 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
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* 40, 41, 42, 43, 44, 45,
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* 62, 63, 64, 65, 66, 67,
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* 71, 72, 74, 75)
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*/
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GPIO_FN_BS, GPIO_FN_WE1,
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GPIO_FN_CKO, GPIO_FN_WAIT, GPIO_FN_RDWR,
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GPIO_FN_A0, GPIO_FN_A1, GPIO_FN_A2, GPIO_FN_A3,
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GPIO_FN_A6, GPIO_FN_A7, GPIO_FN_A8, GPIO_FN_A9,
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GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,
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GPIO_FN_A14, GPIO_FN_A15, GPIO_FN_A16, GPIO_FN_A17,
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GPIO_FN_A18, GPIO_FN_A19, GPIO_FN_A20, GPIO_FN_A21,
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GPIO_FN_A22, GPIO_FN_A23, GPIO_FN_A24, GPIO_FN_A25,
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GPIO_FN_A26,
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GPIO_FN_CS0, GPIO_FN_CS2, GPIO_FN_CS4,
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GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_CS6A,
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/*
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* BSC/FLCTL (PORT 23, 24,
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* 46, 47, 48, 49,
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* 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
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* 60, 61, 69, 70)
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*/
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GPIO_FN_RD_FSC, GPIO_FN_WE0_FWE,
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GPIO_FN_A4_FOE, GPIO_FN_A5_FCDE,
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GPIO_FN_D0_NAF0, GPIO_FN_D1_NAF1, GPIO_FN_D2_NAF2,
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GPIO_FN_D3_NAF3, GPIO_FN_D4_NAF4, GPIO_FN_D5_NAF5,
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GPIO_FN_D6_NAF6, GPIO_FN_D7_NAF7, GPIO_FN_D8_NAF8,
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GPIO_FN_D9_NAF9, GPIO_FN_D10_NAF10, GPIO_FN_D11_NAF11,
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GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, GPIO_FN_D14_NAF14,
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GPIO_FN_D15_NAF15,
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/*
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* MMCIF(1) (PORT 84, 85, 86, 87, 88, 89,
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* 90, 91, 92, 99)
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*/
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GPIO_FN_MMCD0_0, GPIO_FN_MMCD0_1, GPIO_FN_MMCD0_2,
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GPIO_FN_MMCD0_3, GPIO_FN_MMCD0_4, GPIO_FN_MMCD0_5,
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GPIO_FN_MMCD0_6, GPIO_FN_MMCD0_7,
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GPIO_FN_MMCCMD0, GPIO_FN_MMCCLK0,
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/* MMCIF(2) (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */
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GPIO_FN_MMCD1_0, GPIO_FN_MMCD1_1, GPIO_FN_MMCD1_2,
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GPIO_FN_MMCD1_3, GPIO_FN_MMCD1_4, GPIO_FN_MMCD1_5,
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GPIO_FN_MMCD1_6, GPIO_FN_MMCD1_7,
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GPIO_FN_MMCCLK1, GPIO_FN_MMCCMD1,
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/* SPU2 (PORT 65) */
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GPIO_FN_VINT_I,
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/* FLCTL (PORT 66, 68, 73) */
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GPIO_FN_FCE1, GPIO_FN_FCE0, GPIO_FN_FRB,
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/* HSI (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
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GPIO_FN_GP_RX_FLAG, GPIO_FN_GP_RX_DATA, GPIO_FN_GP_TX_READY,
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GPIO_FN_GP_RX_WAKE, GPIO_FN_MP_TX_FLAG, GPIO_FN_MP_TX_DATA,
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GPIO_FN_MP_RX_READY, GPIO_FN_MP_TX_WAKE,
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/*
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* MFI (PORT 76, 77, 78, 79,
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* 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
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* 90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
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*/
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GPIO_FN_MFIv6, /* see MSEL4CR 6 */
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GPIO_FN_MFIv4, /* see MSEL4CR 6 */
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GPIO_FN_MEMC_CS0, GPIO_FN_MEMC_BUSCLK_MEMC_A0,
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GPIO_FN_MEMC_CS1_MEMC_A1, GPIO_FN_MEMC_ADV_MEMC_DREQ0,
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GPIO_FN_MEMC_WAIT_MEMC_DREQ1, GPIO_FN_MEMC_NOE,
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GPIO_FN_MEMC_NWE, GPIO_FN_MEMC_INT,
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GPIO_FN_MEMC_AD0, GPIO_FN_MEMC_AD1, GPIO_FN_MEMC_AD2,
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GPIO_FN_MEMC_AD3, GPIO_FN_MEMC_AD4, GPIO_FN_MEMC_AD5,
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GPIO_FN_MEMC_AD6, GPIO_FN_MEMC_AD7, GPIO_FN_MEMC_AD8,
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GPIO_FN_MEMC_AD9, GPIO_FN_MEMC_AD10, GPIO_FN_MEMC_AD11,
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GPIO_FN_MEMC_AD12, GPIO_FN_MEMC_AD13, GPIO_FN_MEMC_AD14,
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GPIO_FN_MEMC_AD15,
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/* SIM (PORT 94, 95, 98) */
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GPIO_FN_SIM_RST, GPIO_FN_SIM_CLK, GPIO_FN_SIM_D,
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/* TPU (PORT 93, 99, 112, 160, 161) */
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GPIO_FN_TPU0TO0, GPIO_FN_TPU0TO1,
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GPIO_FN_TPU0TO2_93, GPIO_FN_TPU0TO2_99,
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GPIO_FN_TPU0TO3,
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|
|
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/* I2C2 (PORT 110, 111) */
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GPIO_FN_I2C_SCL2, GPIO_FN_I2C_SDA2,
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|
|
|
/* I2C3(1) (PORT 114, 115) */
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GPIO_FN_I2C_SCL3, GPIO_FN_I2C_SDA3,
|
|
|
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/* I2C3(2) (PORT 137, 145) */
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GPIO_FN_I2C_SCL3S, GPIO_FN_I2C_SDA3S,
|
|
|
|
/* I2C4(2) (PORT 116, 117) */
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GPIO_FN_I2C_SCL4, GPIO_FN_I2C_SDA4,
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|
|
|
/* I2C4(2) (PORT 146, 147) */
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GPIO_FN_I2C_SCL4S, GPIO_FN_I2C_SDA4S,
|
|
|
|
/*
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* KEYSC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
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* 130, 131, 132, 133, 134, 135, 136)
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|
*/
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|
GPIO_FN_KEYOUT0, GPIO_FN_KEYIN0_121, GPIO_FN_KEYIN0_136,
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|
GPIO_FN_KEYOUT1, GPIO_FN_KEYIN1_122, GPIO_FN_KEYIN1_135,
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|
GPIO_FN_KEYOUT2, GPIO_FN_KEYIN2_123, GPIO_FN_KEYIN2_134,
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|
GPIO_FN_KEYOUT3, GPIO_FN_KEYIN3_124, GPIO_FN_KEYIN3_133,
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|
GPIO_FN_KEYOUT4, GPIO_FN_KEYIN4,
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|
GPIO_FN_KEYOUT5, GPIO_FN_KEYIN5,
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|
GPIO_FN_KEYOUT6, GPIO_FN_KEYIN6,
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|
GPIO_FN_KEYOUT7, GPIO_FN_KEYIN7,
|
|
|
|
/*
|
|
* LCDC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
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|
* 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
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|
* 140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
|
|
* 150, 151)
|
|
*/
|
|
GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
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|
GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
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|
GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDVSYN,
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|
GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_LCDRD,
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|
GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_LCDLCLK,
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|
GPIO_FN_LCDDON,
|
|
|
|
GPIO_FN_LCDD0, GPIO_FN_LCDD1, GPIO_FN_LCDD2, GPIO_FN_LCDD3,
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|
GPIO_FN_LCDD4, GPIO_FN_LCDD5, GPIO_FN_LCDD6, GPIO_FN_LCDD7,
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|
GPIO_FN_LCDD8, GPIO_FN_LCDD9, GPIO_FN_LCDD10, GPIO_FN_LCDD11,
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|
GPIO_FN_LCDD12, GPIO_FN_LCDD13, GPIO_FN_LCDD14, GPIO_FN_LCDD15,
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|
GPIO_FN_LCDD16, GPIO_FN_LCDD17, GPIO_FN_LCDD18, GPIO_FN_LCDD19,
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|
GPIO_FN_LCDD20, GPIO_FN_LCDD21, GPIO_FN_LCDD22, GPIO_FN_LCDD23,
|
|
|
|
/* IRDA (PORT 139, 140, 141, 142) */
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|
GPIO_FN_IRDA_OUT, GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
|
|
GPIO_FN_IROUT_139, GPIO_FN_IROUT_140,
|
|
|
|
/* TSIF1 (PORT 156, 157, 158, 159) */
|
|
GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
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|
GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
|
|
GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
|
|
GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
|
|
|
|
GPIO_FN_TS_SPSYNC1, GPIO_FN_TS_SDAT1,
|
|
GPIO_FN_TS_SDEN1, GPIO_FN_TS_SCK1,
|
|
|
|
/* TSIF2 (PORT 137, 145, 146, 147) */
|
|
GPIO_FN_TS_SPSYNC2, GPIO_FN_TS_SDAT2,
|
|
GPIO_FN_TS_SDEN2, GPIO_FN_TS_SCK2,
|
|
|
|
/* HDMI (PORT 169, 170) */
|
|
GPIO_FN_HDMI_HPD, GPIO_FN_HDMI_CEC,
|
|
|
|
/* SDHI0 (PORT 171, 172, 173, 174, 175, 176, 177, 178) */
|
|
GPIO_FN_SDHICLK0, GPIO_FN_SDHICD0,
|
|
GPIO_FN_SDHICMD0, GPIO_FN_SDHIWP0,
|
|
GPIO_FN_SDHID0_0, GPIO_FN_SDHID0_1,
|
|
GPIO_FN_SDHID0_2, GPIO_FN_SDHID0_3,
|
|
|
|
/* SDHI1 (PORT 179, 180, 181, 182, 183, 184) */
|
|
GPIO_FN_SDHICLK1, GPIO_FN_SDHICMD1, GPIO_FN_SDHID1_0,
|
|
GPIO_FN_SDHID1_1, GPIO_FN_SDHID1_2, GPIO_FN_SDHID1_3,
|
|
|
|
/* SDHI2 (PORT 185, 186, 187, 188, 189, 190) */
|
|
GPIO_FN_SDHICLK2, GPIO_FN_SDHICMD2, GPIO_FN_SDHID2_0,
|
|
GPIO_FN_SDHID2_1, GPIO_FN_SDHID2_2, GPIO_FN_SDHID2_3,
|
|
|
|
/* SDENC see MSEL4CR 19 */
|
|
GPIO_FN_SDENC_CPG,
|
|
GPIO_FN_SDENC_DV_CLKI,
|
|
};
|
|
|
|
/* DMA slave IDs */
|
|
enum {
|
|
SHDMA_SLAVE_INVALID,
|
|
SHDMA_SLAVE_SCIF0_TX,
|
|
SHDMA_SLAVE_SCIF0_RX,
|
|
SHDMA_SLAVE_SCIF1_TX,
|
|
SHDMA_SLAVE_SCIF1_RX,
|
|
SHDMA_SLAVE_SCIF2_TX,
|
|
SHDMA_SLAVE_SCIF2_RX,
|
|
SHDMA_SLAVE_SCIF3_TX,
|
|
SHDMA_SLAVE_SCIF3_RX,
|
|
SHDMA_SLAVE_SCIF4_TX,
|
|
SHDMA_SLAVE_SCIF4_RX,
|
|
SHDMA_SLAVE_SCIF5_TX,
|
|
SHDMA_SLAVE_SCIF5_RX,
|
|
SHDMA_SLAVE_SCIF6_TX,
|
|
SHDMA_SLAVE_SCIF6_RX,
|
|
SHDMA_SLAVE_SDHI0_RX,
|
|
SHDMA_SLAVE_SDHI0_TX,
|
|
SHDMA_SLAVE_SDHI1_RX,
|
|
SHDMA_SLAVE_SDHI1_TX,
|
|
SHDMA_SLAVE_SDHI2_RX,
|
|
SHDMA_SLAVE_SDHI2_TX,
|
|
SHDMA_SLAVE_MMCIF_RX,
|
|
SHDMA_SLAVE_MMCIF_TX,
|
|
SHDMA_SLAVE_USB0_TX,
|
|
SHDMA_SLAVE_USB0_RX,
|
|
SHDMA_SLAVE_USB1_TX,
|
|
SHDMA_SLAVE_USB1_RX,
|
|
};
|
|
|
|
extern struct clk sh7372_extal1_clk;
|
|
extern struct clk sh7372_extal2_clk;
|
|
extern struct clk sh7372_dv_clki_clk;
|
|
extern struct clk sh7372_dv_clki_div2_clk;
|
|
extern struct clk sh7372_pllc2_clk;
|
|
extern struct clk sh7372_fsiack_clk;
|
|
extern struct clk sh7372_fsibck_clk;
|
|
extern struct clk sh7372_fsidiva_clk;
|
|
extern struct clk sh7372_fsidivb_clk;
|
|
|
|
struct platform_device;
|
|
|
|
struct sh7372_pm_domain {
|
|
struct generic_pm_domain genpd;
|
|
struct dev_power_governor *gov;
|
|
int (*suspend)(void);
|
|
void (*resume)(void);
|
|
unsigned int bit_shift;
|
|
bool no_debug;
|
|
};
|
|
|
|
static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
|
|
{
|
|
return container_of(d, struct sh7372_pm_domain, genpd);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
extern struct sh7372_pm_domain sh7372_a4lc;
|
|
extern struct sh7372_pm_domain sh7372_a4mp;
|
|
extern struct sh7372_pm_domain sh7372_d4;
|
|
extern struct sh7372_pm_domain sh7372_a4r;
|
|
extern struct sh7372_pm_domain sh7372_a3rv;
|
|
extern struct sh7372_pm_domain sh7372_a3ri;
|
|
extern struct sh7372_pm_domain sh7372_a4s;
|
|
extern struct sh7372_pm_domain sh7372_a3sp;
|
|
extern struct sh7372_pm_domain sh7372_a3sg;
|
|
|
|
extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd);
|
|
extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
|
|
struct platform_device *pdev);
|
|
extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
|
|
struct sh7372_pm_domain *sh7372_sd);
|
|
#else
|
|
#define sh7372_init_pm_domain(pd) do { } while(0)
|
|
#define sh7372_add_device_to_domain(pd, pdev) do { } while(0)
|
|
#define sh7372_pm_add_subdomain(pd, sd) do { } while(0)
|
|
#endif /* CONFIG_PM */
|
|
|
|
extern void sh7372_intcs_suspend(void);
|
|
extern void sh7372_intcs_resume(void);
|
|
extern void sh7372_intca_suspend(void);
|
|
extern void sh7372_intca_resume(void);
|
|
|
|
#endif /* __ASM_SH7372_H__ */
|