mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
a06ad4385f
The backlight levels provided in the Draak DT produce a perceived brightness very biased towards high brightness. Use better brightness levels based on the CIE 1931 formula. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
498 lines
7.9 KiB
Plaintext
498 lines
7.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Device Tree Source for the Draak board
|
|
*
|
|
* Copyright (C) 2016-2018 Renesas Electronics Corp.
|
|
* Copyright (C) 2017 Glider bvba
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "r8a77995.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Renesas Draak board based on r8a77995";
|
|
compatible = "renesas,draak", "renesas,r8a77995";
|
|
|
|
aliases {
|
|
serial0 = &scif2;
|
|
ethernet0 = &avb;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "ignore_loglevel";
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm1 0 50000>;
|
|
|
|
brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
|
|
default-brightness-level = <10>;
|
|
|
|
power-supply = <®_12p0v>;
|
|
enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
composite-in {
|
|
compatible = "composite-video-connector";
|
|
|
|
port {
|
|
composite_con_in: endpoint {
|
|
remote-endpoint = <&adv7180_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi-in {
|
|
compatible = "hdmi-connector";
|
|
type = "a";
|
|
|
|
port {
|
|
hdmi_con_in: endpoint {
|
|
remote-endpoint = <&adv7612_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi-out {
|
|
compatible = "hdmi-connector";
|
|
type = "a";
|
|
|
|
port {
|
|
hdmi_con_out: endpoint {
|
|
remote-endpoint = <&adv7511_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
lvds-decoder {
|
|
compatible = "thine,thc63lvd1024";
|
|
vcc-supply = <®_3p3v>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
thc63lvd1024_in: endpoint {
|
|
remote-endpoint = <&lvds0_out>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
thc63lvd1024_out: endpoint {
|
|
remote-endpoint = <&adv7511_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
memory@48000000 {
|
|
device_type = "memory";
|
|
/* first 128MB is reserved for secure area. */
|
|
reg = <0x0 0x48000000 0x0 0x18000000>;
|
|
};
|
|
|
|
reg_1p8v: regulator0 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_3p3v: regulator1 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
reg_12p0v: regulator1 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "D12.0V";
|
|
regulator-min-microvolt = <12000000>;
|
|
regulator-max-microvolt = <12000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vga {
|
|
compatible = "vga-connector";
|
|
|
|
port {
|
|
vga_in: endpoint {
|
|
remote-endpoint = <&adv7123_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
vga-encoder {
|
|
compatible = "adi,adv7123";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
adv7123_in: endpoint {
|
|
remote-endpoint = <&du_out_rgb>;
|
|
};
|
|
};
|
|
port@1 {
|
|
reg = <1>;
|
|
adv7123_out: endpoint {
|
|
remote-endpoint = <&vga_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
x12_clk: x12 {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <74250000>;
|
|
};
|
|
};
|
|
|
|
&avb {
|
|
pinctrl-0 = <&avb0_pins>;
|
|
pinctrl-names = "default";
|
|
renesas,no-ether-link;
|
|
phy-handle = <&phy0>;
|
|
phy-mode = "rgmii-txid";
|
|
status = "okay";
|
|
|
|
phy0: ethernet-phy@0 {
|
|
rxc-skew-ps = <1500>;
|
|
reg = <0>;
|
|
interrupt-parent = <&gpio5>;
|
|
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
|
|
};
|
|
};
|
|
|
|
&du {
|
|
pinctrl-0 = <&du_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
clocks = <&cpg CPG_MOD 724>,
|
|
<&cpg CPG_MOD 723>,
|
|
<&x12_clk>;
|
|
clock-names = "du.0", "du.1", "dclkin.0";
|
|
|
|
ports {
|
|
port@0 {
|
|
endpoint {
|
|
remote-endpoint = <&adv7123_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci0 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&extal_clk {
|
|
clock-frequency = <48000000>;
|
|
};
|
|
|
|
&hsusb {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
composite-in@20 {
|
|
compatible = "adi,adv7180cp";
|
|
reg = <0x20>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
adv7180_in: endpoint {
|
|
remote-endpoint = <&composite_con_in>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
|
|
/*
|
|
* The VIN4 video input path is shared between
|
|
* CVBS and HDMI inputs through SW[49-53]
|
|
* switches.
|
|
*
|
|
* CVBS is the default selection, link it to
|
|
* VIN4 here.
|
|
*/
|
|
adv7180_out: endpoint {
|
|
remote-endpoint = <&vin4_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
hdmi-encoder@39 {
|
|
compatible = "adi,adv7511w";
|
|
reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
|
|
reg-names = "main", "edid", "packet", "cec";
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
/* Depends on LVDS */
|
|
max-clock = <135000000>;
|
|
min-vrefresh = <50>;
|
|
|
|
adi,input-depth = <8>;
|
|
adi,input-colorspace = "rgb";
|
|
adi,input-clock = "1x";
|
|
adi,input-style = <1>;
|
|
adi,input-justification = "evenly";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
adv7511_in: endpoint {
|
|
remote-endpoint = <&thc63lvd1024_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
adv7511_out: endpoint {
|
|
remote-endpoint = <&hdmi_con_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi-decoder@4c {
|
|
compatible = "adi,adv7612";
|
|
reg = <0x4c>;
|
|
default-input = <0>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
adv7612_in: endpoint {
|
|
remote-endpoint = <&hdmi_con_in>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
|
|
/*
|
|
* The VIN4 video input path is shared between
|
|
* CVBS and HDMI inputs through SW[49-53]
|
|
* switches.
|
|
*
|
|
* CVBS is the default selection, leave HDMI
|
|
* not connected here.
|
|
*/
|
|
adv7612_out: endpoint {
|
|
pclk-sample = <0>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
eeprom@50 {
|
|
compatible = "rohm,br24t01", "atmel,24c01";
|
|
reg = <0x50>;
|
|
pagesize = <8>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&lvds0 {
|
|
status = "okay";
|
|
|
|
clocks = <&cpg CPG_MOD 727>,
|
|
<&x12_clk>,
|
|
<&extal_clk>;
|
|
clock-names = "fck", "dclkin.0", "extal";
|
|
|
|
ports {
|
|
port@1 {
|
|
lvds0_out: endpoint {
|
|
remote-endpoint = <&thc63lvd1024_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&lvds1 {
|
|
clocks = <&cpg CPG_MOD 727>,
|
|
<&x12_clk>,
|
|
<&extal_clk>;
|
|
clock-names = "fck", "dclkin.0", "extal";
|
|
};
|
|
|
|
&ohci0 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&pfc {
|
|
avb0_pins: avb {
|
|
mux {
|
|
groups = "avb0_link", "avb0_mdio", "avb0_mii";
|
|
function = "avb0";
|
|
};
|
|
};
|
|
|
|
du_pins: du {
|
|
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
|
|
function = "du";
|
|
};
|
|
|
|
i2c0_pins: i2c0 {
|
|
groups = "i2c0";
|
|
function = "i2c0";
|
|
};
|
|
|
|
i2c1_pins: i2c1 {
|
|
groups = "i2c1";
|
|
function = "i2c1";
|
|
};
|
|
|
|
pwm0_pins: pwm0 {
|
|
groups = "pwm0_c";
|
|
function = "pwm0";
|
|
};
|
|
|
|
pwm1_pins: pwm1 {
|
|
groups = "pwm1_c";
|
|
function = "pwm1";
|
|
};
|
|
|
|
scif2_pins: scif2 {
|
|
groups = "scif2_data";
|
|
function = "scif2";
|
|
};
|
|
|
|
sdhi2_pins: sd2 {
|
|
groups = "mmc_data8", "mmc_ctrl";
|
|
function = "mmc";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
sdhi2_pins_uhs: sd2_uhs {
|
|
groups = "mmc_data8", "mmc_ctrl";
|
|
function = "mmc";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
usb0_pins: usb0 {
|
|
groups = "usb0";
|
|
function = "usb0";
|
|
};
|
|
|
|
vin4_pins_cvbs: vin4 {
|
|
groups = "vin4_data8", "vin4_sync", "vin4_clk";
|
|
function = "vin4";
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
pinctrl-0 = <&pwm0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-0 = <&pwm1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&rwdt {
|
|
timeout-sec = <60>;
|
|
status = "okay";
|
|
};
|
|
|
|
&scif2 {
|
|
pinctrl-0 = <&scif2_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi2 {
|
|
/* used for on-board eMMC */
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
pinctrl-1 = <&sdhi2_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_1p8v>;
|
|
bus-width = <8>;
|
|
mmc-hs200-1_8v;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy0 {
|
|
pinctrl-0 = <&usb0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
renesas,no-otg-pins;
|
|
status = "okay";
|
|
};
|
|
|
|
&vin4 {
|
|
pinctrl-0 = <&vin4_pins_cvbs>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
vin4_in: endpoint {
|
|
remote-endpoint = <&adv7180_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|