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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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be5f362320
Knowing the exact revision of the SoC is required to make runtime decisions in various code paths. We have determined the SoC revision already, so we only need to store that in a global variable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
106 lines
2.2 KiB
C
106 lines
2.2 KiB
C
/*
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* Atheros AR71XX/AR724X/AR913X common definitions
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Atheros' 2.6.15 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_ATH79_H
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#define __ASM_MACH_ATH79_H
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#include <linux/types.h>
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#include <linux/io.h>
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enum ath79_soc_type {
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ATH79_SOC_UNKNOWN,
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ATH79_SOC_AR7130,
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ATH79_SOC_AR7141,
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ATH79_SOC_AR7161,
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ATH79_SOC_AR7240,
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ATH79_SOC_AR7241,
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ATH79_SOC_AR7242,
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ATH79_SOC_AR9130,
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ATH79_SOC_AR9132,
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ATH79_SOC_AR9330,
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ATH79_SOC_AR9331,
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};
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extern enum ath79_soc_type ath79_soc;
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extern unsigned int ath79_soc_rev;
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static inline int soc_is_ar71xx(void)
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{
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return (ath79_soc == ATH79_SOC_AR7130 ||
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ath79_soc == ATH79_SOC_AR7141 ||
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ath79_soc == ATH79_SOC_AR7161);
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}
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static inline int soc_is_ar724x(void)
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{
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return (ath79_soc == ATH79_SOC_AR7240 ||
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ath79_soc == ATH79_SOC_AR7241 ||
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ath79_soc == ATH79_SOC_AR7242);
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}
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static inline int soc_is_ar7240(void)
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{
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return (ath79_soc == ATH79_SOC_AR7240);
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}
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static inline int soc_is_ar7241(void)
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{
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return (ath79_soc == ATH79_SOC_AR7241);
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}
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static inline int soc_is_ar7242(void)
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{
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return (ath79_soc == ATH79_SOC_AR7242);
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}
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static inline int soc_is_ar913x(void)
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{
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return (ath79_soc == ATH79_SOC_AR9130 ||
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ath79_soc == ATH79_SOC_AR9132);
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}
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static inline int soc_is_ar933x(void)
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{
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return (ath79_soc == ATH79_SOC_AR9330 ||
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ath79_soc == ATH79_SOC_AR9331);
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}
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extern void __iomem *ath79_ddr_base;
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extern void __iomem *ath79_pll_base;
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extern void __iomem *ath79_reset_base;
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static inline void ath79_pll_wr(unsigned reg, u32 val)
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{
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__raw_writel(val, ath79_pll_base + reg);
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}
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static inline u32 ath79_pll_rr(unsigned reg)
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{
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return __raw_readl(ath79_pll_base + reg);
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}
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static inline void ath79_reset_wr(unsigned reg, u32 val)
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{
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__raw_writel(val, ath79_reset_base + reg);
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}
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static inline u32 ath79_reset_rr(unsigned reg)
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{
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return __raw_readl(ath79_reset_base + reg);
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}
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void ath79_device_reset_set(u32 mask);
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void ath79_device_reset_clear(u32 mask);
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#endif /* __ASM_MACH_ATH79_H */
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